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Message-ID: <aEj3kAy5bOXPA_1O@infradead.org>
Date: Tue, 10 Jun 2025 20:27:12 -0700
From: Christoph Hellwig <hch@...radead.org>
To: grwhyte@...ux.microsoft.com
Cc: linux-pci@...r.kernel.org, shyamsaini@...ux.microsoft.com,
code@...icks.com, Okaya@...nel.org, bhelgaas@...gle.com,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 0/2] PCI: Reduce FLR delay to 10ms for MSFT devices
On Wed, Jun 11, 2025 at 12:05:50AM +0000, grwhyte@...ux.microsoft.com wrote:
> From: Graham Whyte <grwhyte@...ux.microsoft.com>
>
> Add a new flr_delay member of the pci_dev struct to allow customization of
> the delay after FLR for devices that do not support immediate readiness
> or readiness time reporting. The main scenario this addresses is VF
> removal and rescan during runtime repairs and driver updates, which,
> if fixed to 100ms, introduces significant delays across multiple VFs.
> These delays are unnecessary for devices that complete the FLR well
> within this timeframe.
Please work with the PCIe SIG to have a standard capability for this
instead of piling up hacks like this quirk.
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