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Message-ID: <20250611113748.2986988-4-john.ernberg@actia.se>
Date: Wed, 11 Jun 2025 11:38:09 +0000
From: John Ernberg <john.ernberg@...ia.se>
To: Horia Geantă <horia.geanta@....com>, Pankaj Gupta
<pankaj.gupta@....com>, Gaurav Jain <gaurav.jain@....com>, Herbert Xu
<herbert@...dor.apana.org.au>, "David S . Miller" <davem@...emloft.net>, "Rob
Herring" <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, "Conor
Dooley" <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>, Sascha Hauer
<s.hauer@...gutronix.de>
CC: Peng Fan <peng.fan@....com>, Frank Li <Frank.Li@....com>, "Pengutronix
Kernel Team" <kernel@...gutronix.de>, Fabio Estevam <festevam@...il.com>,
"linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"imx@...ts.linux.dev" <imx@...ts.linux.dev>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, John Ernberg <john.ernberg@...ia.se>
Subject: [PATCH v6 3/4] dt-bindings: crypto: fsl,sec-v4.0: Add power domains
for iMX8QM and iMX8QXP
NXP SoCs like the iMX8QM, iMX8QXP or iMX8DXP use power domains for
resource management.
Add compatible strings for these SoCs (QXP and DXP gets to share as their
only difference is a core-count, Q=Quad core and D=Dual core), and allow
power-domains for them only. Keep the old restriction for others.
Signed-off-by: John Ernberg <john.ernberg@...ia.se>
Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
---
v6:
- no changes
v5:
- Fixup indentation (Rob Herring's bot)
- Collect tags
v4:
- Reword commit message (Frank Li)
- Add explicit imx8qxp compatible (Frank Li)
- Move the job-ring constraints back to the job-ring section under an
'allOf:' to avoid the warning from v2 (Rob Herring)
v3:
- Fix warnings discovered by Rob Herring's bot
- Declare the compatibles correctly (Krzysztof Kozlowski)
v2:
- Adjust commit message (Frank Li)
- Only allow power-domains when compatible with imx8qm (Frank Li)
---
.../bindings/crypto/fsl,sec-v4.0.yaml | 41 ++++++++++++++++++-
1 file changed, 40 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml b/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml
index 75afa441e019..dcc755d2709a 100644
--- a/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml
+++ b/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml
@@ -46,6 +46,8 @@ properties:
- items:
- enum:
- fsl,imx6ul-caam
+ - fsl,imx8qm-caam
+ - fsl,imx8qxp-caam
- fsl,sec-v5.0
- const: fsl,sec-v4.0
- const: fsl,sec-v4.0
@@ -77,6 +79,9 @@ properties:
interrupts:
maxItems: 1
+ power-domains:
+ maxItems: 1
+
fsl,sec-era:
description: Defines the 'ERA' of the SEC device.
$ref: /schemas/types.yaml#/definitions/uint32
@@ -106,7 +111,10 @@ patternProperties:
- const: fsl,sec-v5.0-job-ring
- const: fsl,sec-v4.0-job-ring
- items:
- - const: fsl,sec-v5.0-job-ring
+ - enum:
+ - fsl,imx8qm-job-ring
+ - fsl,imx8qxp-job-ring
+ - fsl,sec-v5.0-job-ring
- const: fsl,sec-v4.0-job-ring
- const: fsl,sec-v4.0-job-ring
@@ -116,6 +124,9 @@ patternProperties:
interrupts:
maxItems: 1
+ power-domains:
+ maxItems: 1
+
fsl,liodn:
description:
Specifies the LIODN to be used in conjunction with the ppid-to-liodn
@@ -125,6 +136,20 @@ patternProperties:
$ref: /schemas/types.yaml#/definitions/uint32-array
items:
- maximum: 0xfff
+ allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx8qm-job-ring
+ - fsl,imx8qxp-job-ring
+ then:
+ required:
+ - power-domains
+ else:
+ properties:
+ power-domains: false
'^rtic@[0-9a-f]+$':
type: object
@@ -212,6 +237,20 @@ required:
- reg
- ranges
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx8qm-caam
+ - fsl,imx8qxp-caam
+then:
+ required:
+ - power-domains
+else:
+ properties:
+ power-domains: false
+
additionalProperties: false
examples:
--
2.49.0
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