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Message-ID: <20250612142306.3c3dl46z326xvcud@skbuf>
Date: Thu, 12 Jun 2025 17:23:06 +0300
From: Vladimir Oltean <vladimir.oltean@....com>
To: James Clark <james.clark@...aro.org>
Cc: Arnd Bergmann <arnd@...db.de>, Frank Li <Frank.li@....com>,
Vladimir Oltean <olteanv@...il.com>,
Mark Brown <broonie@...nel.org>, linux-spi@...r.kernel.org,
imx@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/4] spi: spi-fsl-dspi: Use non-coherent memory for DMA
On Thu, Jun 12, 2025 at 03:14:32PM +0100, James Clark wrote:
> > That's why I don't like the DMA mode in DSPI, it's still CPU-bound,
> > because the DMA buffers are very small (you can only provide one TX FIFO
> > worth of data per DMA transfer, rather than the whole buffer).
>
> Is that right? The FIFO size isn't used in any of the DMA codepaths, it
> looks like the whole DMA buffer is filled before initiating the transfer.
> And we increase the buffer to 4k in this patchset to fully use the existing
> allocation.
Uhm, yeah, no?
dspi_dma_xfer():
while (dspi->len) {
dspi->words_in_flight = dspi->len / dspi->oper_word_size;
if (dspi->words_in_flight > dspi->devtype_data->fifo_size)
dspi->words_in_flight = dspi->devtype_data->fifo_size;
dspi_next_xfer_dma_submit();
}
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