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Message-ID: <20250612143833.2612714-1-uwu@icenowy.me>
Date: Thu, 12 Jun 2025 22:38:33 +0800
From: Icenowy Zheng <uwu@...nowy.me>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Chen-Yu Tsai <wenst@...omium.org>
Cc: devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
Icenowy Zheng <uwu@...nowy.me>
Subject: [PATCH] arm64: dts: mediatek: mt8173: lower SD clock and disable wp on Elm
The microSD slot of Elm seems to have a little signal quality issue and
cannot work at 200MHz. In addition, a microSD slot cannot handle
write-protection.
Lower the clock frequency to 100MHz and add "disable-wp" property to
eliminate a note of assuming RW.
My Hana device, which is a Lenovo Flex 11 Chromebook, can handle 200MHz;
so hana DTSI still have its max SD frequency set to 200MHz.
Signed-off-by: Icenowy Zheng <uwu@...nowy.me>
---
arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi | 1 +
arch/arm64/boot/dts/mediatek/mt8173-elm.dts | 5 +++++
arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 1 -
3 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi b/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi
index dfc5c2f0ddefd..3147240cfa6ae 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi
@@ -68,6 +68,7 @@ trackpad2: trackpad@2c {
};
&mmc1 {
+ max-frequency = <200000000>;
wp-gpios = <&pio 42 GPIO_ACTIVE_HIGH>;
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dts b/arch/arm64/boot/dts/mediatek/mt8173-elm.dts
index 2390d04204e83..3385183b60d36 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173-elm.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8173-elm.dts
@@ -13,3 +13,8 @@ / {
"google,elm-rev5", "google,elm-rev4", "google,elm-rev3",
"google,elm", "mediatek,mt8173";
};
+
+&mmc1 {
+ max-frequency = <100000000>;
+ disable-wp;
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi
index 0d995b342d463..2a253a90bce1b 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi
@@ -402,7 +402,6 @@ &mmc1 {
pinctrl-0 = <&mmc1_pins_default>;
pinctrl-1 = <&mmc1_pins_uhs>;
bus-width = <4>;
- max-frequency = <200000000>;
cap-sd-highspeed;
sd-uhs-sdr50;
sd-uhs-sdr104;
--
2.49.0
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