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Message-ID: <57ad1095-89ba-4044-91ce-1ab37bcc79dd@linux.microsoft.com>
Date: Thu, 12 Jun 2025 09:41:45 -0700
From: Graham Whyte <grwhyte@...ux.microsoft.com>
To: Christoph Hellwig <hch@...radead.org>
Cc: Niklas Cassel <cassel@...nel.org>, linux-pci@...r.kernel.org,
shyamsaini@...ux.microsoft.com, code@...icks.com, Okaya@...nel.org,
bhelgaas@...gle.com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 0/2] PCI: Reduce FLR delay to 10ms for MSFT devices
On 6/11/2025 11:31 PM, Christoph Hellwig wrote:
> On Wed, Jun 11, 2025 at 01:08:21PM -0700, Graham Whyte wrote:
>> We can ask our HW engineers to implement function readiness but we need
>> to be able to support exiting products, hence why posting it as a quirk.
>
> Your report sounds like it works perfectly fine, it's just that you
> want to reduce the delay. For that you'll need to stick to the standard
> methods instead of adding quirks, which are for buggy hardware that does
> not otherwise work.
Bjorn, what would you recommend as next steps here?
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