linux-kernel - Re: [PATCH] crypto: padlock-sha - Add support for Zhaoxin processor

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Message-ID: <aEpgKQ1I0VDSfhO0@gondor.apana.org.au>
Date: Thu, 12 Jun 2025 13:05:45 +0800
From: Herbert Xu <herbert@...dor.apana.org.au>
To: AlanSong-oc <AlanSong-oc@...oxin.com>
Cc: davem@...emloft.net, linux-crypto@...r.kernel.org,
	linux-kernel@...r.kernel.org, CobeChen@...oxin.com,
	TonyWWang-oc@...oxin.com, YunShen@...oxin.com,
	GeorgeXue@...oxin.com, LeoLiu-oc@...oxin.com, HansHu@...oxin.com
Subject: Re: [PATCH] crypto: padlock-sha - Add support for Zhaoxin processor

On Wed, Jun 11, 2025 at 06:17:50PM +0800, AlanSong-oc wrote:
>
> +static int padlock_sha1_update_zhaoxin(struct shash_desc *desc,
> +                                   const u8 *src, unsigned int len)
> +{
> +       struct sha1_state *state = padlock_shash_desc_ctx(desc);
> +       int blocks = len / SHA1_BLOCK_SIZE;
> +
> +       /* The xsha1 instruction requires a 32-byte buffer for execution for Zhaoxin processors */
> +       u8 buf[32 + PADLOCK_ALIGNMENT - 1];
> +       u8 *dst = PTR_ALIGN(&buf[0], PADLOCK_ALIGNMENT);

The padlock has always had an alignment requirement.  We already
deal with this by using PADLOCK_ALIGNMENT.  So rather than re-inventing
it here, you should simply change PADLOCK_ALIGNMENT to 32 for Zhaoxin.

You should also fix the comment to state that 32 is for alignment
rather than the size.  The Nano already requires an 128-byte buffer
and we cater for that so it can't be the size that's the problem
here.

Cheers,
-- 
Email: Herbert Xu <herbert@...dor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt