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Message-ID: <aEwrfy63cvBLr5yc@wunner.de>
Date: Fri, 13 Jun 2025 15:45:35 +0200
From: Lukas Wunner <lukas@...ner.de>
To: Manivannan Sadhasivam <mani@...nel.org>
Cc: grwhyte@...ux.microsoft.com, linux-pci@...r.kernel.org,
shyamsaini@...ux.microsoft.com, code@...icks.com, Okaya@...nel.org,
bhelgaas@...gle.com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 0/2] PCI: Reduce FLR delay to 10ms for MSFT devices
On Fri, Jun 13, 2025 at 05:12:48PM +0530, Manivannan Sadhasivam wrote:
> On Wed, Jun 11, 2025 at 12:05:50AM +0000, grwhyte@...ux.microsoft.com wrote:
> > Add a new flr_delay member of the pci_dev struct to allow customization of
> > the delay after FLR for devices that do not support immediate readiness
> > or readiness time reporting. The main scenario this addresses is VF
> > removal and rescan during runtime repairs and driver updates, which,
> > if fixed to 100ms, introduces significant delays across multiple VFs.
> > These delays are unnecessary for devices that complete the FLR well
> > within this timeframe.
> >
>
> I don't think it is acceptable to *reduce* the standard delay just
> because your device completes it more quickly. Proper way to reduce
> the timing would be to support FRS as you said, but we cannot have
> arbitrary delays for random devices.
To be fair, we already have that for certain devices:
The quirk delay_250ms_after_flr() is referenced by three different
Vendor ID / Device ID combos and *lengthens* the delay after FLR.
It's probably difficult to justify rejecting custom delays for
certain MANA devices, even though we allowed them for three other
devices.
The proposed patch introduces a generic solution which avoids
further cluttering up pci_dev_reset_methods[] with extra entries,
so I think it's an approach worth considering.
There are a bunch of nits in the proposed patches, such as "pci"
not being capitalized, but the general approach seems fine to me.
Thanks,
Lukas
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