lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <SJ2PR11MB845226B24E9E3B33A5DE39009B77A@SJ2PR11MB8452.namprd11.prod.outlook.com>
Date: Fri, 13 Jun 2025 20:16:00 +0000
From: "Kubalewski, Arkadiusz" <arkadiusz.kubalewski@...el.com>
To: Jakub Kicinski <kuba@...nel.org>
CC: "donald.hunter@...il.com" <donald.hunter@...il.com>, "davem@...emloft.net"
	<davem@...emloft.net>, "edumazet@...gle.com" <edumazet@...gle.com>,
	"pabeni@...hat.com" <pabeni@...hat.com>, "horms@...nel.org"
	<horms@...nel.org>, "vadim.fedorenko@...ux.dev" <vadim.fedorenko@...ux.dev>,
	"jiri@...nulli.us" <jiri@...nulli.us>, "Nguyen, Anthony L"
	<anthony.l.nguyen@...el.com>, "Kitszel, Przemyslaw"
	<przemyslaw.kitszel@...el.com>, "andrew+netdev@...n.ch"
	<andrew+netdev@...n.ch>, "Loktionov, Aleksandr"
	<aleksandr.loktionov@...el.com>, "corbet@....net" <corbet@....net>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"intel-wired-lan@...ts.osuosl.org" <intel-wired-lan@...ts.osuosl.org>,
	"linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
	"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>, "Olech, Milena"
	<milena.olech@...el.com>, Jiri Pirko <jiri@...dia.com>
Subject: RE: [PATCH net-next v5 1/3] dpll: add reference-sync netlink
 attribute

>From: Jakub Kicinski <kuba@...nel.org>
>Sent: Thursday, June 12, 2025 1:54 AM
>
>On Tue, 10 Jun 2025 06:04:34 +0200 Arkadiusz Kubalewski wrote:
>> +The device may support the Reference SYNC feature, which allows the
>>combination
>> +of two inputs into a input pair. In this configuration, clock signals
>> +from both inputs are used to synchronize the dpll device. The higher
>>frequency
>                                                ^^^^
>                                                DPLL ?
>

Sure, fixed in v6.

>> +signal is utilized for the loop bandwidth of the DPLL, while the lower
>>frequency
>> +signal is used to syntonize the output signal of the DPLL device. This
>>feature
>> +enables the provision of a high-quality loop bandwidth signal from an
>>external
>> +source.
>
>Looks like there is a conflict between this series and patches sent
>by Tony the day before. You'll have to rebase.
>--
>pw-bot: cr

Also rebased

Thank you!
Arkadiusz


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ