linux-kernel - [PATCH RFT 1/2] arm64: dts: toshiba: Update SoC and PCIe ranges to reflect hardware behavior

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Message-Id: <20250613-tmpv-v1-1-4023aa386d17@nxp.com>
Date: Fri, 13 Jun 2025 17:33:29 -0400
From: Frank Li <Frank.Li@....com>
To: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...hiba.co.jp>, 
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Lorenzo Pieralisi <lpieralisi@...nel.org>, 
 Krzysztof Wilczyński <kwilczynski@...nel.org>, 
 Manivannan Sadhasivam <mani@...nel.org>, 
 Bjorn Helgaas <bhelgaas@...gle.com>
Cc: linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org, 
 Frank Li <Frank.Li@....com>
Subject: [PATCH RFT 1/2] arm64: dts: toshiba: Update SoC and PCIe ranges to
 reflect hardware behavior

tmpv7708 trim address bit[31:30] in tmpv7708 before passing to the PCIe
controller. So add a 'ranges' entry under the parent bus 'soc' to map
address 0x0 to 0x40000000.

Update the PCIe node's 'config' and 'ranges' properties to use the real
upstream bus address.

Ensure there is no functional impact on the final address translation
result.

Prepare for the removal of the driver’s cpu_addr_fixup().

Signed-off-by: Frank Li <Frank.Li@....com>
---
 arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
index 39806f0ae5133..2a18aa93d4723 100644
--- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
+++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
@@ -147,7 +147,15 @@ soc {
 		#size-cells = <2>;
 		compatible = "simple-bus";
 		interrupt-parent = <&gic>;
-		ranges;
+		ranges = /* register 1:1 map */
+			 <0x0 0x24000000 0x0 0x24000000 0x0 0x10000000>,
+			 /*
+			  * bus fabric mask address bit 30 and 31 to 0
+			  * before send to PCIe controller.
+			  *
+			  * PCIe map address 0 to cpu's 0x40000000
+			  */
+			 <0x0 0x00000000 0x0 0x40000000 0x0 0x40000000>;
 
 		gic: interrupt-controller@...01000 {
 			compatible = "arm,gic-400";
@@ -481,7 +489,7 @@ pwm: pwm@...c0000 {
 		pcie: pcie@...00000 {
 			compatible = "toshiba,visconti-pcie";
 			reg = <0x0 0x28400000 0x0 0x00400000>,
-			      <0x0 0x70000000 0x0 0x10000000>,
+			      <0x0 0x30000000 0x0 0x10000000>,
 			      <0x0 0x28050000 0x0 0x00010000>,
 			      <0x0 0x24200000 0x0 0x00002000>,
 			      <0x0 0x24162000 0x0 0x00001000>;
@@ -494,8 +502,8 @@ pcie: pcie@...00000 {
 			#address-cells = <3>;
 			#size-cells = <2>;
 			#interrupt-cells = <1>;
-			ranges = <0x81000000 0 0x40000000 0 0x40000000 0 0x00010000
-				  0x82000000 0 0x50000000 0 0x50000000 0 0x20000000>;
+			ranges = <0x81000000 0 0x00000000 0 0x00000000 0 0x00010000
+				  0x82000000 0 0x10000000 0 0x10000000 0 0x20000000>;
 			interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "msi", "intr";

-- 
2.34.1