[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <36cb3578-1efb-4d2e-b50a-47e6dfd3bdd0@kernel.org>
Date: Fri, 13 Jun 2025 11:44:47 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Jacky Chou <jacky_chou@...eedtech.com>, bhelgaas@...gle.com,
lpieralisi@...nel.org, kwilczynski@...nel.org, mani@...nel.org,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, joel@....id.au,
andrew@...econstruct.com.au, vkoul@...nel.org, kishon@...nel.org,
linus.walleij@...aro.org, p.zabel@...gutronix.de,
linux-aspeed@...ts.ozlabs.org, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-phy@...ts.infradead.org,
openbmc@...ts.ozlabs.org, linux-gpio@...r.kernel.org
Cc: elbadrym@...gle.com, romlem@...gle.com, anhphan@...gle.com,
wak@...gle.com, yuxiaozhang@...gle.com, BMC-SW@...eedtech.com
Subject: Re: [PATCH 1/7] dt-bindings: phy: Add document for ASPEED PCIe PHY
On 13/06/2025 05:29, Jacky Chou wrote:
> Add device tree binding YAML documentation for the ASPEED PCIe PHY.
> This schema describes the required properties for the PCIe PHY node,
> including compatible strings and register space, and provides an
> example for reference.
>
> Signed-off-by: Jacky Chou <jacky_chou@...eedtech.com>
> ---
> .../bindings/phy/aspeed-pcie-phy.yaml | 38 +++++++++++++++++++
Filename basedon compatible
A nit, subject: drop second/last, redundant "document for". The
"dt-bindings" prefix is already stating that these are documents.
See also:
https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18
> MAINTAINERS | 10 +++++
> 2 files changed, 48 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/aspeed-pcie-phy.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/aspeed-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/aspeed-pcie-phy.yaml
> new file mode 100644
> index 000000000000..762bf7b0aedc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/aspeed-pcie-phy.yaml
> @@ -0,0 +1,38 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/aspeed-pcie-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ASPEED PCIe PHY
> +
> +maintainers:
> + - Jacky Chou <jacky_chou@...eedtech.com>
> +
> +description: |
Do not need '|' unless you need to preserve formatting.
> + The ASPEED PCIe PHY provides the physical layer interface for PCIe
> + controllers in the SoC. This node represents the register block for the PCIe
> + PHY, which is typically accessed by PCIe Root Complex or Endpoint drivers
> + via syscon.
> +
> +properties:
> + compatible:
> + enum:
> + - aspeed,ast2600-pcie-phy
> + - aspeed,ast2700-pcie-phy
> +
> + reg:
> + maxItems: 1
> +
No phy cells? How is this a phy exactly?
No resources? This looks just incomplete.
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + pcie-phy@...ed200 {
> + compatible = "aspeed,ast2600-pcie-phy";
> + reg = <0x1e6ed200 0x100>;
> + };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a5a650812c16..68115443607d 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -3696,6 +3696,16 @@ S: Maintained
> F: Documentation/devicetree/bindings/media/aspeed,video-engine.yaml
> F: drivers/media/platform/aspeed/
>
> +ASPEED PCIE CONTROLLER DRIVER
> +M: Jacky Chou <jacky_chou@...eedtech.com>
> +L: linux-aspeed@...ts.ozlabs.org (moderated for non-subscribers)
> +L: linux-pci@...r.kernel.org
> +S: Maintained
> +F: Documentation/devicetree/bindings/pci/aspeed-pcie-cfg.yaml
> +F: Documentation/devicetree/bindings/pci/aspeed-pcie.yaml
> +F: Documentation/devicetree/bindings/phy/aspeed-pcie-phy.yaml
> +F: drivers/pci/controller/pcie-aspeed.c
There is no such file... actually many above do not exist.
Best regards,
Krzysztof
Powered by blists - more mailing lists