[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <9be50674-357d-45d8-9117-b66922b46d25@kernel.org>
Date: Fri, 13 Jun 2025 11:51:05 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Jacky Chou <jacky_chou@...eedtech.com>, bhelgaas@...gle.com,
lpieralisi@...nel.org, kwilczynski@...nel.org, mani@...nel.org,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, joel@....id.au,
andrew@...econstruct.com.au, vkoul@...nel.org, kishon@...nel.org,
linus.walleij@...aro.org, p.zabel@...gutronix.de,
linux-aspeed@...ts.ozlabs.org, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-phy@...ts.infradead.org,
openbmc@...ts.ozlabs.org, linux-gpio@...r.kernel.org
Cc: elbadrym@...gle.com, romlem@...gle.com, anhphan@...gle.com,
wak@...gle.com, yuxiaozhang@...gle.com, BMC-SW@...eedtech.com
Subject: Re: [PATCH 4/7] ARM: dts: aspeed-g6: Add AST2600 PCIe RC PERST ctrl
pin
On 13/06/2025 05:29, Jacky Chou wrote:
> Add pinctrl support for PCIe RC PERST pin.
>
> Signed-off-by: Jacky Chou <jacky_chou@...eedtech.com>
> ---
> arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi
> index 289668f051eb..a93e15c64a4b 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi
> @@ -2,6 +2,11 @@
> // Copyright 2019 IBM Corp.
>
> &pinctrl {
> + pinctrl_pcierc1_default: pcierc1_default {
No underscores in node names. Follow finally DTS coding style. You have
been told that in previous patchsets already.
Best regards,
Krzysztof
Powered by blists - more mailing lists