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Message-ID: <59944b49-67dd-43a8-b6a4-a1ad0b9baa59@linaro.org>
Date: Fri, 13 Jun 2025 12:42:33 +0100
From: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
To: vincent.knecht@...loo.org, Robert Foss <rfoss@...nel.org>,
Todor Tomov <todor.too@...il.com>, Mauro Carvalho Chehab
<mchehab@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>
Cc: linux-kernel@...r.kernel.org, linux-media@...r.kernel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
André Apitzsch <git@...tzsch.eu>,
phone-devel@...r.kernel.org, ~postmarketos/upstreaming@...ts.sr.ht,
Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: Re: [PATCH v5 3/4] media: dt-bindings: Add qcom,msm8939-camss
On 13/06/2025 10:33, Vincent Knecht via B4 Relay wrote:
> From: Vincent Knecht <vincent.knecht@...loo.org>
>
> Add bindings for qcom,msm8939-camss in order to support the camera
> subsystem for MSM8939.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Signed-off-by: Vincent Knecht <vincent.knecht@...loo.org>
> ---
> .../bindings/media/qcom,msm8939-camss.yaml | 254 +++++++++++++++++++++
> 1 file changed, 254 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..9fbb4b204ac8728b822864ad8336aa9d826d6b5b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml
> @@ -0,0 +1,254 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/qcom,msm8939-camss.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm MSM8939 Camera Subsystem (CAMSS)
> +
> +maintainers:
> + - Vincent Knecht <vincent.knecht@...loo.org>
> +
> +description:
> + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
> +
> +properties:
> + compatible:
> + const: qcom,msm8939-camss
> +
> + reg:
> + maxItems: 11
> +
> + reg-names:
> + items:
> + - const: csi_clk_mux
> + - const: csid0
> + - const: csid1
> + - const: csid2
> + - const: csiphy0
> + - const: csiphy0_clk_mux
> + - const: csiphy1
> + - const: csiphy1_clk_mux
> + - const: ispif
> + - const: vfe0
> + - const: vfe0_vbif
> +
> + clocks:
> + maxItems: 24
> +
> + clock-names:
> + items:
> + - const: ahb
> + - const: csi0
> + - const: csi0_ahb
> + - const: csi0_phy
> + - const: csi0_pix
> + - const: csi0_rdi
> + - const: csi1
> + - const: csi1_ahb
> + - const: csi1_phy
> + - const: csi1_pix
> + - const: csi1_rdi
> + - const: csi2
> + - const: csi2_ahb
> + - const: csi2_phy
> + - const: csi2_pix
> + - const: csi2_rdi
> + - const: csi_vfe0
> + - const: csiphy0_timer
> + - const: csiphy1_timer
> + - const: ispif_ahb
> + - const: top_ahb
> + - const: vfe0
> + - const: vfe_ahb
> + - const: vfe_axi
> +
> + interrupts:
> + maxItems: 7
> +
> + interrupt-names:
> + items:
> + - const: csid0
> + - const: csid1
> + - const: csid2
> + - const: csiphy0
> + - const: csiphy1
> + - const: ispif
> + - const: vfe0
> +
> + iommus:
> + maxItems: 1
> +
> + power-domains:
> + items:
> + - description: VFE GDSC - Video Front End, Global Distributed Switch
> + Controller.
> +
> + vdda-supply:
> + description:
> + Definition of the regulator used as 1.2V analog power supply.
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + description:
> + CSI input ports.
> +
> + patternProperties:
> + "^port@[0-1]$":
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> +
> + description:
> + Input port for receiving CSI data.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> + bus-type:
> + enum:
> + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
> +
> + required:
> + - data-lanes
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - clocks
> + - clock-names
> + - interrupts
> + - interrupt-names
> + - iommus
> + - power-domains
> + - vdda-supply
> + - ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/clock/qcom,gcc-msm8939.h>
> +
> + isp@...0020 {
> + compatible = "qcom,msm8939-camss";
> +
> + reg = <0x01b00020 0x10>,
> + <0x01b08000 0x100>,
> + <0x01b08400 0x100>,
> + <0x01b08800 0x100>,
> + <0x01b0ac00 0x200>,
> + <0x01b00030 0x4>,
> + <0x01b0b000 0x200>,
> + <0x01b00038 0x4>,
> + <0x01b0a000 0x500>,
> + <0x01b10000 0x1000>,
> + <0x01b40000 0x200>;
> +
> + reg-names = "csi_clk_mux",
> + "csid0",
> + "csid1",
> + "csid2",
> + "csiphy0",
> + "csiphy0_clk_mux",
> + "csiphy1",
> + "csiphy1_clk_mux",
> + "ispif",
> + "vfe0",
> + "vfe0_vbif";
> +
> + clocks = <&gcc GCC_CAMSS_AHB_CLK>,
> + <&gcc GCC_CAMSS_CSI0_CLK>,
> + <&gcc GCC_CAMSS_CSI0_AHB_CLK>,
> + <&gcc GCC_CAMSS_CSI0PHY_CLK>,
> + <&gcc GCC_CAMSS_CSI0PIX_CLK>,
> + <&gcc GCC_CAMSS_CSI0RDI_CLK>,
> + <&gcc GCC_CAMSS_CSI1_CLK>,
> + <&gcc GCC_CAMSS_CSI1_AHB_CLK>,
> + <&gcc GCC_CAMSS_CSI1PHY_CLK>,
> + <&gcc GCC_CAMSS_CSI1PIX_CLK>,
> + <&gcc GCC_CAMSS_CSI1RDI_CLK>,
> + <&gcc GCC_CAMSS_CSI2_CLK>,
> + <&gcc GCC_CAMSS_CSI2_AHB_CLK>,
> + <&gcc GCC_CAMSS_CSI2PHY_CLK>,
> + <&gcc GCC_CAMSS_CSI2PIX_CLK>,
> + <&gcc GCC_CAMSS_CSI2RDI_CLK>,
> + <&gcc GCC_CAMSS_CSI_VFE0_CLK>,
> + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
> + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
> + <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
> + <&gcc GCC_CAMSS_TOP_AHB_CLK>,
> + <&gcc GCC_CAMSS_VFE0_CLK>,
> + <&gcc GCC_CAMSS_VFE_AHB_CLK>,
> + <&gcc GCC_CAMSS_VFE_AXI_CLK>;
> +
> + clock-names = "ahb",
> + "csi0",
> + "csi0_ahb",
> + "csi0_phy",
> + "csi0_pix",
> + "csi0_rdi",
> + "csi1",
> + "csi1_ahb",
> + "csi1_phy",
> + "csi1_pix",
> + "csi1_rdi",
> + "csi2",
> + "csi2_ahb",
> + "csi2_phy",
> + "csi2_pix",
> + "csi2_rdi",
> + "csi_vfe0",
> + "csiphy0_timer",
> + "csiphy1_timer",
> + "ispif_ahb",
> + "top_ahb",
> + "vfe0",
> + "vfe_ahb",
> + "vfe_axi";
> +
> + interrupts = <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
> +
> + interrupt-names = "csid0",
> + "csid1",
> + "csid2",
> + "csiphy0",
> + "csiphy1",
> + "ispif",
> + "vfe0";
> +
> + iommus = <&apps_iommu 3>;
> +
> + power-domains = <&gcc VFE_GDSC>;
> +
> + vdda-supply = <®_1v2>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@1 {
> + reg = <1>;
> +
> + csiphy1_ep: endpoint {
> + data-lanes = <0 2>;
> + remote-endpoint = <&sensor_ep>;
> + };
> + };
> + };
> + };
>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
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