linux-kernel - Re: [PATCH 3/8] dt-bindings: clock: renesas,cpg-mssr: Document RZ/N2H support

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Message-ID: <CA+V-a8vUdBwAx5x1FfWJZK0BeXQQqFeDRLtvyETiPDQc1Pftiw@mail.gmail.com>
Date: Fri, 13 Jun 2025 12:57:53 +0100
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
Cc: Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Magnus Damm <magnus.damm@...il.com>, linux-renesas-soc@...r.kernel.org, 
	linux-clk@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH 3/8] dt-bindings: clock: renesas,cpg-mssr: Document RZ/N2H support

Hi Geert,

Thank you for the review.

On Thu, Jun 12, 2025 at 3:38 PM Geert Uytterhoeven <geert@...ux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> Thanks for your patch!
>
> On Mon, 9 Jun 2025 at 22:37, Prabhakar <prabhakar.csengg@...il.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> >
> > Document support for Module Standby and Software Reset found on the
>
> the Clock Generator and Module Standby and Software Reset
>
Ok, I'll amend the commit message as above.

> > Renesas RZ/N2H (R9A09G087) SoC. The Module Standby and Software Reset IP
>
> Clock Generator and ...
>
Ok, I'll amend the commit message as above.

> > is similar to that found on the RZ/T2H SoC.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> > --- /dev/null
> > +++ b/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h
> > @@ -0,0 +1,28 @@
> > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > + *
> > + * Copyright (C) 2025 Renesas Electronics Corp.
> > + */
> > +
> > +#ifndef __DT_BINDINGS_CLOCK_RENESAS_R9A09G087_CPG_H__
> > +#define __DT_BINDINGS_CLOCK_RENESAS_R9A09G087_CPG_H__
> > +
> > +#include <dt-bindings/clock/renesas-cpg-mssr.h>
> > +
> > +/* R9A09G087 CPG Core Clocks */
> > +#define R9A09G087_CLK_CA55C0           0
> > +#define R9A09G087_CLK_CA55C1           1
> > +#define R9A09G087_CLK_CA55C2           2
> > +#define R9A09G087_CLK_CA55C3           3
> > +#define R9A09G087_CLK_CA55S            4
> > +#define R9A09G087_CLK_CR52_CPU0                5
> > +#define R9A09G087_CLK_CR52_CPU1                6
> > +#define R9A09G087_CLK_CKIO             7
> > +#define R9A09G087_CLK_PCLKAH           8
> > +#define R9A09G087_CLK_PCLKAM           9
> > +#define R9A09G087_CLK_PCLKAL           10
> > +#define R9A09G087_CLK_PCLKGPTL         11
> > +#define R9A09G087_CLK_PCLKH            12
> > +#define R9A09G087_CLK_PCLKM            13
> > +#define R9A09G087_CLK_PCLKL            14
>
> The RZ/T2H DT bindings file lacks PCLKL, which was probably a harmless
> oversight (it can always be added later), as it does exist on RZ/T2H,
> too, according to the documentation.
>
> However, given drivers/clk/renesas/r9a09g077-cpg.c has
> LAST_DT_CORE_CLK = R9A09G077_CLK_PCLKM,
> using R9A09G087_CLK_PCLKL will lead to wrong results.
>
> So either you want to add R9A09G077_CLK_PCLKL and update
> LAST_DT_CORE_CLK first, or set LAST_DT_CORE_CLK to R9A09G087_CLK_PCLKL
> in this patch.
>
Actually I already have a patch which includes a couple of fixes and
to the orignal bring up series for T2H + I2C support which adds
R9A09G077_CLK_PCLKL and updates LAST_DT_CORE_CLK. I intend to send
them when the base patches are accepted. As there are no users for
PCLKL in the bringup series this won't cause any issues. Is that OK
with you?

Cheers,
Prabhakar