[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <f2508b08-5a6b-4104-9da8-461e179421b9@oss.qualcomm.com>
Date: Sat, 14 Jun 2025 20:32:11 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Antony Kurniawan Soemardi <linux@...nkusors.com>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Max Shevchenko <wctrl@...ton.me>,
Rudraksha Gupta <guptarud@...il.com>
Subject: Re: [PATCH 2/5] ARM: dts: qcom: msm8960: add gsbi8 and its serial
configuration
On 6/13/25 7:50 PM, Antony Kurniawan Soemardi wrote:
> The LTE variant of the MSM8960 SoC has a gsbi8 node used for the
> serial console.
>
> That's if the downstream kernel is to be believed, as Xperia SP has
> a serial console on gsbi8 even on the non-LTE variant.
>
> Signed-off-by: Antony Kurniawan Soemardi <linux@...nkusors.com>
> ---
> arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> index 4babd0bbe5d638b228e05cdfe6b068b4ea16335f..66071ad498e49c4f54ba105fa94640575fe08da6 100644
> --- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> +++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> @@ -333,6 +333,30 @@ gsbi5_serial: serial@...40000 {
> };
> };
>
> + gsbi8: gsbi@...00000 {
> + compatible = "qcom,gsbi-v1.0.0";
> + cell-index = <8>;
> + reg = <0x1a000000 0x100>;
> + clocks = <&gcc GSBI8_H_CLK>;
> + clock-names = "iface";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + syscon-tcsr = <&tcsr>;
> + status = "disabled";
> +
> + gsbi8_serial: serial@...40000 {
> + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
> + reg = <0x1a040000 0x1000>,
> + <0x1a000000 0x1000>;
This is way off - please make sure you editor's tab width is set to 8
and align the '<'s
> + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GSBI8_UART_CLK>, <&gcc GSBI8_H_CLK>;
> + clock-names = "core", "iface";
Please also keep one entry per line, '<'s and '"' aligned.
I know it's not how other nodes do it, but this is an old file
Konrad
Powered by blists - more mailing lists