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Message-ID: <20250616205227.2qmzv2fsbx6j533t@skbuf>
Date: Mon, 16 Jun 2025 23:52:27 +0300
From: Vladimir Oltean <olteanv@...il.com>
To: Andrew Lunn <andrew@...n.ch>
Cc: Robert Cross <quantumcross@...il.com>, netdev@...r.kernel.org,
bpf@...r.kernel.org, davem@...emloft.net, edumazet@...gle.com,
kuba@...nel.org, pabeni@...hat.com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] net: dsa: mv88e6xxx: fix external smi for mv88e6176
Hi Andrew,
On Mon, Jun 16, 2025 at 08:43:14PM +0200, Andrew Lunn wrote:
> On Mon, Jun 16, 2025 at 02:22:43PM -0400, Robert Cross wrote:
> > According to the documents I'm looking at, the 88E6172 and
> > 88E6176 both have external MDIO buses. I have brought up
> > a board with two connected 88E6176 chips, each with a PHY
> > that can only be managed with the MDC/MDIO_PHY pins of
> > the 88E6176s.
> >
> > After applying this patch I was able to successfully manage
> > and control these external PHYs without issue. I'm not sure
> > if you have access to the 88E6176 datasheet specifically,
> > but this chip absolutely does have an external MDIO.
>
> You are not understanding what i'm saying. This family has a single
> MDIO bus controller. That controller is used by both the internal PHY
> devices, plus there are two pins on the chip for external PHYs.
>
> All the PHYs will appear on that one MDIO bus controller.
>
> The MV88E6390_G2_SMI_PHY_CMD_FUNC_EXTERNAL bit is reserved on the 6352
> family.
>
> Andrew
Is there any addition to Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml
that we could make in order to clarify which switch families have a
combined internal+external MDIO bus and which ones have them separate?
As you're saying, this is an area where mistakes happen relatively
frequently.
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