| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20250616-rework-icc-v1-18-bc1326294d71@oss.qualcomm.com>
Date: Mon, 16 Jun 2025 03:28:30 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Georgi Djakov <djakov@...nel.org>, Bjorn Andersson <andersson@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 18/28] interconnect: qcom: sdx65: convert to dynamic IDs
Stop using fixed and IDs and covert the platform to use dynamic IDs for
the interconnect. This gives more flexibility and also allows us to drop
the .num_links member, saving from possible errors related to it being
not set or set incorrectly.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
---
drivers/interconnect/qcom/sdx65.c | 519 +++++++++++++++++++-------------------
drivers/interconnect/qcom/sdx65.h | 65 -----
2 files changed, 257 insertions(+), 327 deletions(-)
diff --git a/drivers/interconnect/qcom/sdx65.c b/drivers/interconnect/qcom/sdx65.c
index cf24f94eef6e0e1a7c1e957e07a316803942d174..267eeeec0e655e13c9643c432139f4b94542d959 100644
--- a/drivers/interconnect/qcom/sdx65.c
+++ b/drivers/interconnect/qcom/sdx65.c
@@ -13,595 +13,587 @@
#include "bcm-voter.h"
#include "icc-rpmh.h"
-#include "sdx65.h"
+
+static struct qcom_icc_node llcc_mc;
+static struct qcom_icc_node acm_tcu;
+static struct qcom_icc_node qnm_snoc_gc;
+static struct qcom_icc_node xm_apps_rdwr;
+static struct qcom_icc_node qhm_audio;
+static struct qcom_icc_node qhm_blsp1;
+static struct qcom_icc_node qhm_qdss_bam;
+static struct qcom_icc_node qhm_qpic;
+static struct qcom_icc_node qhm_snoc_cfg;
+static struct qcom_icc_node qhm_spmi_fetcher1;
+static struct qcom_icc_node qnm_aggre_noc;
+static struct qcom_icc_node qnm_ipa;
+static struct qcom_icc_node qnm_memnoc;
+static struct qcom_icc_node qnm_memnoc_pcie;
+static struct qcom_icc_node qxm_crypto;
+static struct qcom_icc_node xm_ipa2pcie_slv;
+static struct qcom_icc_node xm_pcie;
+static struct qcom_icc_node xm_qdss_etr;
+static struct qcom_icc_node xm_sdc1;
+static struct qcom_icc_node xm_usb3;
+static struct qcom_icc_node ebi;
+static struct qcom_icc_node qns_llcc;
+static struct qcom_icc_node qns_memnoc_snoc;
+static struct qcom_icc_node qns_sys_pcie;
+static struct qcom_icc_node qhs_aoss;
+static struct qcom_icc_node qhs_apss;
+static struct qcom_icc_node qhs_audio;
+static struct qcom_icc_node qhs_blsp1;
+static struct qcom_icc_node qhs_clk_ctl;
+static struct qcom_icc_node qhs_crypto0_cfg;
+static struct qcom_icc_node qhs_ddrss_cfg;
+static struct qcom_icc_node qhs_ecc_cfg;
+static struct qcom_icc_node qhs_imem_cfg;
+static struct qcom_icc_node qhs_ipa;
+static struct qcom_icc_node qhs_mss_cfg;
+static struct qcom_icc_node qhs_pcie_parf;
+static struct qcom_icc_node qhs_pdm;
+static struct qcom_icc_node qhs_prng;
+static struct qcom_icc_node qhs_qdss_cfg;
+static struct qcom_icc_node qhs_qpic;
+static struct qcom_icc_node qhs_sdc1;
+static struct qcom_icc_node qhs_snoc_cfg;
+static struct qcom_icc_node qhs_spmi_fetcher;
+static struct qcom_icc_node qhs_spmi_vgi_coex;
+static struct qcom_icc_node qhs_tcsr;
+static struct qcom_icc_node qhs_tlmm;
+static struct qcom_icc_node qhs_usb3;
+static struct qcom_icc_node qhs_usb3_phy;
+static struct qcom_icc_node qns_aggre_noc;
+static struct qcom_icc_node qns_snoc_memnoc;
+static struct qcom_icc_node qxs_imem;
+static struct qcom_icc_node srvc_snoc;
+static struct qcom_icc_node xs_pcie;
+static struct qcom_icc_node xs_qdss_stm;
+static struct qcom_icc_node xs_sys_tcu_cfg;
static struct qcom_icc_node llcc_mc = {
.name = "llcc_mc",
- .id = SDX65_MASTER_LLCC,
.channels = 1,
.buswidth = 4,
- .num_links = 1,
- .links = { SDX65_SLAVE_EBI1 },
+ .link_nodes = { &ebi, NULL },
};
static struct qcom_icc_node acm_tcu = {
.name = "acm_tcu",
- .id = SDX65_MASTER_TCU_0,
.channels = 1,
.buswidth = 8,
- .num_links = 3,
- .links = { SDX65_SLAVE_LLCC,
- SDX65_SLAVE_MEM_NOC_SNOC,
- SDX65_SLAVE_MEM_NOC_PCIE_SNOC
- },
+ .link_nodes = { &qns_llcc,
+ &qns_memnoc_snoc,
+ &qns_sys_pcie, NULL },
};
static struct qcom_icc_node qnm_snoc_gc = {
.name = "qnm_snoc_gc",
- .id = SDX65_MASTER_SNOC_GC_MEM_NOC,
.channels = 1,
.buswidth = 16,
- .num_links = 1,
- .links = { SDX65_SLAVE_LLCC },
+ .link_nodes = { &qns_llcc, NULL },
};
static struct qcom_icc_node xm_apps_rdwr = {
.name = "xm_apps_rdwr",
- .id = SDX65_MASTER_APPSS_PROC,
.channels = 1,
.buswidth = 16,
- .num_links = 3,
- .links = { SDX65_SLAVE_LLCC,
- SDX65_SLAVE_MEM_NOC_SNOC,
- SDX65_SLAVE_MEM_NOC_PCIE_SNOC
- },
+ .link_nodes = { &qns_llcc,
+ &qns_memnoc_snoc,
+ &qns_sys_pcie, NULL },
};
static struct qcom_icc_node qhm_audio = {
.name = "qhm_audio",
- .id = SDX65_MASTER_AUDIO,
.channels = 1,
.buswidth = 4,
- .num_links = 1,
- .links = { SDX65_SLAVE_ANOC_SNOC },
+ .link_nodes = { &qns_aggre_noc, NULL },
};
static struct qcom_icc_node qhm_blsp1 = {
.name = "qhm_blsp1",
- .id = SDX65_MASTER_BLSP_1,
.channels = 1,
.buswidth = 4,
- .num_links = 1,
- .links = { SDX65_SLAVE_ANOC_SNOC },
+ .link_nodes = { &qns_aggre_noc, NULL },
};
static struct qcom_icc_node qhm_qdss_bam = {
.name = "qhm_qdss_bam",
- .id = SDX65_MASTER_QDSS_BAM,
- .channels = 1,
- .buswidth = 4,
- .num_links = 26,
- .links = { SDX65_SLAVE_AOSS,
- SDX65_SLAVE_AUDIO,
- SDX65_SLAVE_BLSP_1,
- SDX65_SLAVE_CLK_CTL,
- SDX65_SLAVE_CRYPTO_0_CFG,
- SDX65_SLAVE_CNOC_DDRSS,
- SDX65_SLAVE_ECC_CFG,
- SDX65_SLAVE_IMEM_CFG,
- SDX65_SLAVE_IPA_CFG,
- SDX65_SLAVE_CNOC_MSS,
- SDX65_SLAVE_PCIE_PARF,
- SDX65_SLAVE_PDM,
- SDX65_SLAVE_PRNG,
- SDX65_SLAVE_QDSS_CFG,
- SDX65_SLAVE_QPIC,
- SDX65_SLAVE_SDCC_1,
- SDX65_SLAVE_SNOC_CFG,
- SDX65_SLAVE_SPMI_FETCHER,
- SDX65_SLAVE_SPMI_VGI_COEX,
- SDX65_SLAVE_TCSR,
- SDX65_SLAVE_TLMM,
- SDX65_SLAVE_USB3,
- SDX65_SLAVE_USB3_PHY_CFG,
- SDX65_SLAVE_SNOC_MEM_NOC_GC,
- SDX65_SLAVE_IMEM,
- SDX65_SLAVE_TCU
- },
+ .channels = 1,
+ .buswidth = 4,
+ .link_nodes = { &qhs_aoss,
+ &qhs_audio,
+ &qhs_blsp1,
+ &qhs_clk_ctl,
+ &qhs_crypto0_cfg,
+ &qhs_ddrss_cfg,
+ &qhs_ecc_cfg,
+ &qhs_imem_cfg,
+ &qhs_ipa,
+ &qhs_mss_cfg,
+ &qhs_pcie_parf,
+ &qhs_pdm,
+ &qhs_prng,
+ &qhs_qdss_cfg,
+ &qhs_qpic,
+ &qhs_sdc1,
+ &qhs_snoc_cfg,
+ &qhs_spmi_fetcher,
+ &qhs_spmi_vgi_coex,
+ &qhs_tcsr,
+ &qhs_tlmm,
+ &qhs_usb3,
+ &qhs_usb3_phy,
+ &qns_snoc_memnoc,
+ &qxs_imem,
+ &xs_sys_tcu_cfg, NULL },
};
static struct qcom_icc_node qhm_qpic = {
.name = "qhm_qpic",
- .id = SDX65_MASTER_QPIC,
.channels = 1,
.buswidth = 4,
- .num_links = 4,
- .links = { SDX65_SLAVE_AOSS,
- SDX65_SLAVE_AUDIO,
- SDX65_SLAVE_IPA_CFG,
- SDX65_SLAVE_ANOC_SNOC
- },
+ .link_nodes = { &qhs_aoss,
+ &qhs_audio,
+ &qhs_ipa,
+ &qns_aggre_noc, NULL },
};
static struct qcom_icc_node qhm_snoc_cfg = {
.name = "qhm_snoc_cfg",
- .id = SDX65_MASTER_SNOC_CFG,
.channels = 1,
.buswidth = 4,
- .num_links = 1,
- .links = { SDX65_SLAVE_SERVICE_SNOC },
+ .link_nodes = { &srvc_snoc, NULL },
};
static struct qcom_icc_node qhm_spmi_fetcher1 = {
.name = "qhm_spmi_fetcher1",
- .id = SDX65_MASTER_SPMI_FETCHER,
.channels = 1,
.buswidth = 4,
- .num_links = 2,
- .links = { SDX65_SLAVE_AOSS,
- SDX65_SLAVE_ANOC_SNOC
- },
+ .link_nodes = { &qhs_aoss,
+ &qns_aggre_noc, NULL },
};
static struct qcom_icc_node qnm_aggre_noc = {
.name = "qnm_aggre_noc",
- .id = SDX65_MASTER_ANOC_SNOC,
.channels = 1,
.buswidth = 8,
- .num_links = 29,
- .links = { SDX65_SLAVE_AOSS,
- SDX65_SLAVE_APPSS,
- SDX65_SLAVE_AUDIO,
- SDX65_SLAVE_BLSP_1,
- SDX65_SLAVE_CLK_CTL,
- SDX65_SLAVE_CRYPTO_0_CFG,
- SDX65_SLAVE_CNOC_DDRSS,
- SDX65_SLAVE_ECC_CFG,
- SDX65_SLAVE_IMEM_CFG,
- SDX65_SLAVE_IPA_CFG,
- SDX65_SLAVE_CNOC_MSS,
- SDX65_SLAVE_PCIE_PARF,
- SDX65_SLAVE_PDM,
- SDX65_SLAVE_PRNG,
- SDX65_SLAVE_QDSS_CFG,
- SDX65_SLAVE_QPIC,
- SDX65_SLAVE_SDCC_1,
- SDX65_SLAVE_SNOC_CFG,
- SDX65_SLAVE_SPMI_FETCHER,
- SDX65_SLAVE_SPMI_VGI_COEX,
- SDX65_SLAVE_TCSR,
- SDX65_SLAVE_TLMM,
- SDX65_SLAVE_USB3,
- SDX65_SLAVE_USB3_PHY_CFG,
- SDX65_SLAVE_SNOC_MEM_NOC_GC,
- SDX65_SLAVE_IMEM,
- SDX65_SLAVE_PCIE_0,
- SDX65_SLAVE_QDSS_STM,
- SDX65_SLAVE_TCU
- },
+ .link_nodes = { &qhs_aoss,
+ &qhs_apss,
+ &qhs_audio,
+ &qhs_blsp1,
+ &qhs_clk_ctl,
+ &qhs_crypto0_cfg,
+ &qhs_ddrss_cfg,
+ &qhs_ecc_cfg,
+ &qhs_imem_cfg,
+ &qhs_ipa,
+ &qhs_mss_cfg,
+ &qhs_pcie_parf,
+ &qhs_pdm,
+ &qhs_prng,
+ &qhs_qdss_cfg,
+ &qhs_qpic,
+ &qhs_sdc1,
+ &qhs_snoc_cfg,
+ &qhs_spmi_fetcher,
+ &qhs_spmi_vgi_coex,
+ &qhs_tcsr,
+ &qhs_tlmm,
+ &qhs_usb3,
+ &qhs_usb3_phy,
+ &qns_snoc_memnoc,
+ &qxs_imem,
+ &xs_pcie,
+ &xs_qdss_stm,
+ &xs_sys_tcu_cfg, NULL },
};
static struct qcom_icc_node qnm_ipa = {
.name = "qnm_ipa",
- .id = SDX65_MASTER_IPA,
.channels = 1,
.buswidth = 8,
- .num_links = 26,
- .links = { SDX65_SLAVE_AOSS,
- SDX65_SLAVE_AUDIO,
- SDX65_SLAVE_BLSP_1,
- SDX65_SLAVE_CLK_CTL,
- SDX65_SLAVE_CRYPTO_0_CFG,
- SDX65_SLAVE_CNOC_DDRSS,
- SDX65_SLAVE_ECC_CFG,
- SDX65_SLAVE_IMEM_CFG,
- SDX65_SLAVE_IPA_CFG,
- SDX65_SLAVE_CNOC_MSS,
- SDX65_SLAVE_PCIE_PARF,
- SDX65_SLAVE_PDM,
- SDX65_SLAVE_PRNG,
- SDX65_SLAVE_QDSS_CFG,
- SDX65_SLAVE_QPIC,
- SDX65_SLAVE_SDCC_1,
- SDX65_SLAVE_SNOC_CFG,
- SDX65_SLAVE_SPMI_FETCHER,
- SDX65_SLAVE_TCSR,
- SDX65_SLAVE_TLMM,
- SDX65_SLAVE_USB3,
- SDX65_SLAVE_USB3_PHY_CFG,
- SDX65_SLAVE_SNOC_MEM_NOC_GC,
- SDX65_SLAVE_IMEM,
- SDX65_SLAVE_PCIE_0,
- SDX65_SLAVE_QDSS_STM
- },
+ .link_nodes = { &qhs_aoss,
+ &qhs_audio,
+ &qhs_blsp1,
+ &qhs_clk_ctl,
+ &qhs_crypto0_cfg,
+ &qhs_ddrss_cfg,
+ &qhs_ecc_cfg,
+ &qhs_imem_cfg,
+ &qhs_ipa,
+ &qhs_mss_cfg,
+ &qhs_pcie_parf,
+ &qhs_pdm,
+ &qhs_prng,
+ &qhs_qdss_cfg,
+ &qhs_qpic,
+ &qhs_sdc1,
+ &qhs_snoc_cfg,
+ &qhs_spmi_fetcher,
+ &qhs_tcsr,
+ &qhs_tlmm,
+ &qhs_usb3,
+ &qhs_usb3_phy,
+ &qns_snoc_memnoc,
+ &qxs_imem,
+ &xs_pcie,
+ &xs_qdss_stm, NULL },
};
static struct qcom_icc_node qnm_memnoc = {
.name = "qnm_memnoc",
- .id = SDX65_MASTER_MEM_NOC_SNOC,
.channels = 1,
.buswidth = 8,
- .num_links = 27,
- .links = { SDX65_SLAVE_AOSS,
- SDX65_SLAVE_APPSS,
- SDX65_SLAVE_AUDIO,
- SDX65_SLAVE_BLSP_1,
- SDX65_SLAVE_CLK_CTL,
- SDX65_SLAVE_CRYPTO_0_CFG,
- SDX65_SLAVE_CNOC_DDRSS,
- SDX65_SLAVE_ECC_CFG,
- SDX65_SLAVE_IMEM_CFG,
- SDX65_SLAVE_IPA_CFG,
- SDX65_SLAVE_CNOC_MSS,
- SDX65_SLAVE_PCIE_PARF,
- SDX65_SLAVE_PDM,
- SDX65_SLAVE_PRNG,
- SDX65_SLAVE_QDSS_CFG,
- SDX65_SLAVE_QPIC,
- SDX65_SLAVE_SDCC_1,
- SDX65_SLAVE_SNOC_CFG,
- SDX65_SLAVE_SPMI_FETCHER,
- SDX65_SLAVE_SPMI_VGI_COEX,
- SDX65_SLAVE_TCSR,
- SDX65_SLAVE_TLMM,
- SDX65_SLAVE_USB3,
- SDX65_SLAVE_USB3_PHY_CFG,
- SDX65_SLAVE_IMEM,
- SDX65_SLAVE_QDSS_STM,
- SDX65_SLAVE_TCU
- },
+ .link_nodes = { &qhs_aoss,
+ &qhs_apss,
+ &qhs_audio,
+ &qhs_blsp1,
+ &qhs_clk_ctl,
+ &qhs_crypto0_cfg,
+ &qhs_ddrss_cfg,
+ &qhs_ecc_cfg,
+ &qhs_imem_cfg,
+ &qhs_ipa,
+ &qhs_mss_cfg,
+ &qhs_pcie_parf,
+ &qhs_pdm,
+ &qhs_prng,
+ &qhs_qdss_cfg,
+ &qhs_qpic,
+ &qhs_sdc1,
+ &qhs_snoc_cfg,
+ &qhs_spmi_fetcher,
+ &qhs_spmi_vgi_coex,
+ &qhs_tcsr,
+ &qhs_tlmm,
+ &qhs_usb3,
+ &qhs_usb3_phy,
+ &qxs_imem,
+ &xs_qdss_stm,
+ &xs_sys_tcu_cfg, NULL },
};
static struct qcom_icc_node qnm_memnoc_pcie = {
.name = "qnm_memnoc_pcie",
- .id = SDX65_MASTER_MEM_NOC_PCIE_SNOC,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX65_SLAVE_PCIE_0 },
+ .link_nodes = { &xs_pcie, NULL },
};
static struct qcom_icc_node qxm_crypto = {
.name = "qxm_crypto",
- .id = SDX65_MASTER_CRYPTO,
.channels = 1,
.buswidth = 8,
- .num_links = 2,
- .links = { SDX65_SLAVE_AOSS,
- SDX65_SLAVE_ANOC_SNOC
- },
+ .link_nodes = { &qhs_aoss,
+ &qns_aggre_noc, NULL },
};
static struct qcom_icc_node xm_ipa2pcie_slv = {
.name = "xm_ipa2pcie_slv",
- .id = SDX65_MASTER_IPA_PCIE,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX65_SLAVE_PCIE_0 },
+ .link_nodes = { &xs_pcie, NULL },
};
static struct qcom_icc_node xm_pcie = {
.name = "xm_pcie",
- .id = SDX65_MASTER_PCIE_0,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX65_SLAVE_ANOC_SNOC },
+ .link_nodes = { &qns_aggre_noc, NULL },
};
static struct qcom_icc_node xm_qdss_etr = {
.name = "xm_qdss_etr",
- .id = SDX65_MASTER_QDSS_ETR,
.channels = 1,
.buswidth = 8,
- .num_links = 26,
- .links = { SDX65_SLAVE_AOSS,
- SDX65_SLAVE_AUDIO,
- SDX65_SLAVE_BLSP_1,
- SDX65_SLAVE_CLK_CTL,
- SDX65_SLAVE_CRYPTO_0_CFG,
- SDX65_SLAVE_CNOC_DDRSS,
- SDX65_SLAVE_ECC_CFG,
- SDX65_SLAVE_IMEM_CFG,
- SDX65_SLAVE_IPA_CFG,
- SDX65_SLAVE_CNOC_MSS,
- SDX65_SLAVE_PCIE_PARF,
- SDX65_SLAVE_PDM,
- SDX65_SLAVE_PRNG,
- SDX65_SLAVE_QDSS_CFG,
- SDX65_SLAVE_QPIC,
- SDX65_SLAVE_SDCC_1,
- SDX65_SLAVE_SNOC_CFG,
- SDX65_SLAVE_SPMI_FETCHER,
- SDX65_SLAVE_SPMI_VGI_COEX,
- SDX65_SLAVE_TCSR,
- SDX65_SLAVE_TLMM,
- SDX65_SLAVE_USB3,
- SDX65_SLAVE_USB3_PHY_CFG,
- SDX65_SLAVE_SNOC_MEM_NOC_GC,
- SDX65_SLAVE_IMEM,
- SDX65_SLAVE_TCU
- },
+ .link_nodes = { &qhs_aoss,
+ &qhs_audio,
+ &qhs_blsp1,
+ &qhs_clk_ctl,
+ &qhs_crypto0_cfg,
+ &qhs_ddrss_cfg,
+ &qhs_ecc_cfg,
+ &qhs_imem_cfg,
+ &qhs_ipa,
+ &qhs_mss_cfg,
+ &qhs_pcie_parf,
+ &qhs_pdm,
+ &qhs_prng,
+ &qhs_qdss_cfg,
+ &qhs_qpic,
+ &qhs_sdc1,
+ &qhs_snoc_cfg,
+ &qhs_spmi_fetcher,
+ &qhs_spmi_vgi_coex,
+ &qhs_tcsr,
+ &qhs_tlmm,
+ &qhs_usb3,
+ &qhs_usb3_phy,
+ &qns_snoc_memnoc,
+ &qxs_imem,
+ &xs_sys_tcu_cfg, NULL },
};
static struct qcom_icc_node xm_sdc1 = {
.name = "xm_sdc1",
- .id = SDX65_MASTER_SDCC_1,
.channels = 1,
.buswidth = 8,
- .num_links = 4,
- .links = { SDX65_SLAVE_AOSS,
- SDX65_SLAVE_AUDIO,
- SDX65_SLAVE_IPA_CFG,
- SDX65_SLAVE_ANOC_SNOC
- },
+ .link_nodes = { &qhs_aoss,
+ &qhs_audio,
+ &qhs_ipa,
+ &qns_aggre_noc, NULL },
};
static struct qcom_icc_node xm_usb3 = {
.name = "xm_usb3",
- .id = SDX65_MASTER_USB3,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX65_SLAVE_ANOC_SNOC },
+ .link_nodes = { &qns_aggre_noc, NULL },
};
static struct qcom_icc_node ebi = {
.name = "ebi",
- .id = SDX65_SLAVE_EBI1,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qns_llcc = {
.name = "qns_llcc",
- .id = SDX65_SLAVE_LLCC,
.channels = 1,
.buswidth = 16,
- .num_links = 1,
- .links = { SDX65_MASTER_LLCC },
+ .link_nodes = { &llcc_mc, NULL },
};
static struct qcom_icc_node qns_memnoc_snoc = {
.name = "qns_memnoc_snoc",
- .id = SDX65_SLAVE_MEM_NOC_SNOC,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX65_MASTER_MEM_NOC_SNOC },
+ .link_nodes = { &qnm_memnoc, NULL },
};
static struct qcom_icc_node qns_sys_pcie = {
.name = "qns_sys_pcie",
- .id = SDX65_SLAVE_MEM_NOC_PCIE_SNOC,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX65_MASTER_MEM_NOC_PCIE_SNOC },
+ .link_nodes = { &qnm_memnoc_pcie, NULL },
};
static struct qcom_icc_node qhs_aoss = {
.name = "qhs_aoss",
- .id = SDX65_SLAVE_AOSS,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_apss = {
.name = "qhs_apss",
- .id = SDX65_SLAVE_APPSS,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_audio = {
.name = "qhs_audio",
- .id = SDX65_SLAVE_AUDIO,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_blsp1 = {
.name = "qhs_blsp1",
- .id = SDX65_SLAVE_BLSP_1,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_clk_ctl = {
.name = "qhs_clk_ctl",
- .id = SDX65_SLAVE_CLK_CTL,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_crypto0_cfg = {
.name = "qhs_crypto0_cfg",
- .id = SDX65_SLAVE_CRYPTO_0_CFG,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_ddrss_cfg = {
.name = "qhs_ddrss_cfg",
- .id = SDX65_SLAVE_CNOC_DDRSS,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_ecc_cfg = {
.name = "qhs_ecc_cfg",
- .id = SDX65_SLAVE_ECC_CFG,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_imem_cfg = {
.name = "qhs_imem_cfg",
- .id = SDX65_SLAVE_IMEM_CFG,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_ipa = {
.name = "qhs_ipa",
- .id = SDX65_SLAVE_IPA_CFG,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_mss_cfg = {
.name = "qhs_mss_cfg",
- .id = SDX65_SLAVE_CNOC_MSS,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_pcie_parf = {
.name = "qhs_pcie_parf",
- .id = SDX65_SLAVE_PCIE_PARF,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_pdm = {
.name = "qhs_pdm",
- .id = SDX65_SLAVE_PDM,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_prng = {
.name = "qhs_prng",
- .id = SDX65_SLAVE_PRNG,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_qdss_cfg = {
.name = "qhs_qdss_cfg",
- .id = SDX65_SLAVE_QDSS_CFG,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_qpic = {
.name = "qhs_qpic",
- .id = SDX65_SLAVE_QPIC,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_sdc1 = {
.name = "qhs_sdc1",
- .id = SDX65_SLAVE_SDCC_1,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_snoc_cfg = {
.name = "qhs_snoc_cfg",
- .id = SDX65_SLAVE_SNOC_CFG,
.channels = 1,
.buswidth = 4,
- .num_links = 1,
- .links = { SDX65_MASTER_SNOC_CFG },
+ .link_nodes = { &qhm_snoc_cfg, NULL },
};
static struct qcom_icc_node qhs_spmi_fetcher = {
.name = "qhs_spmi_fetcher",
- .id = SDX65_SLAVE_SPMI_FETCHER,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_spmi_vgi_coex = {
.name = "qhs_spmi_vgi_coex",
- .id = SDX65_SLAVE_SPMI_VGI_COEX,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_tcsr = {
.name = "qhs_tcsr",
- .id = SDX65_SLAVE_TCSR,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_tlmm = {
.name = "qhs_tlmm",
- .id = SDX65_SLAVE_TLMM,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_usb3 = {
.name = "qhs_usb3",
- .id = SDX65_SLAVE_USB3,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_usb3_phy = {
.name = "qhs_usb3_phy",
- .id = SDX65_SLAVE_USB3_PHY_CFG,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qns_aggre_noc = {
.name = "qns_aggre_noc",
- .id = SDX65_SLAVE_ANOC_SNOC,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX65_MASTER_ANOC_SNOC },
+ .link_nodes = { &qnm_aggre_noc, NULL },
};
static struct qcom_icc_node qns_snoc_memnoc = {
.name = "qns_snoc_memnoc",
- .id = SDX65_SLAVE_SNOC_MEM_NOC_GC,
.channels = 1,
.buswidth = 16,
- .num_links = 1,
- .links = { SDX65_MASTER_SNOC_GC_MEM_NOC },
+ .link_nodes = { &qnm_snoc_gc, NULL },
};
static struct qcom_icc_node qxs_imem = {
.name = "qxs_imem",
- .id = SDX65_SLAVE_IMEM,
.channels = 1,
.buswidth = 8,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node srvc_snoc = {
.name = "srvc_snoc",
- .id = SDX65_SLAVE_SERVICE_SNOC,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node xs_pcie = {
.name = "xs_pcie",
- .id = SDX65_SLAVE_PCIE_0,
.channels = 1,
.buswidth = 8,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node xs_qdss_stm = {
.name = "xs_qdss_stm",
- .id = SDX65_SLAVE_QDSS_STM,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node xs_sys_tcu_cfg = {
.name = "xs_sys_tcu_cfg",
- .id = SDX65_SLAVE_TCU,
.channels = 1,
.buswidth = 8,
+ .link_nodes = { NULL },
};
static struct qcom_icc_bcm bcm_ce0 = {
@@ -759,6 +751,7 @@ static struct qcom_icc_node * const mc_virt_nodes[] = {
};
static const struct qcom_icc_desc sdx65_mc_virt = {
+ .alloc_dyn_id = true,
.nodes = mc_virt_nodes,
.num_nodes = ARRAY_SIZE(mc_virt_nodes),
.bcms = mc_virt_bcms,
@@ -781,6 +774,7 @@ static struct qcom_icc_node * const mem_noc_nodes[] = {
};
static const struct qcom_icc_desc sdx65_mem_noc = {
+ .alloc_dyn_id = true,
.nodes = mem_noc_nodes,
.num_nodes = ARRAY_SIZE(mem_noc_nodes),
.bcms = mem_noc_bcms,
@@ -857,6 +851,7 @@ static struct qcom_icc_node * const system_noc_nodes[] = {
};
static const struct qcom_icc_desc sdx65_system_noc = {
+ .alloc_dyn_id = true,
.nodes = system_noc_nodes,
.num_nodes = ARRAY_SIZE(system_noc_nodes),
.bcms = system_noc_bcms,
diff --git a/drivers/interconnect/qcom/sdx65.h b/drivers/interconnect/qcom/sdx65.h
deleted file mode 100644
index 5dca6e8b32c99942e4a4f474999bc72ea2fb4fb6..0000000000000000000000000000000000000000
--- a/drivers/interconnect/qcom/sdx65.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
- */
-
-#ifndef __DRIVERS_INTERCONNECT_QCOM_SDX65_H
-#define __DRIVERS_INTERCONNECT_QCOM_SDX65_H
-
-#define SDX65_MASTER_TCU_0 0
-#define SDX65_MASTER_LLCC 1
-#define SDX65_MASTER_AUDIO 2
-#define SDX65_MASTER_BLSP_1 3
-#define SDX65_MASTER_QDSS_BAM 4
-#define SDX65_MASTER_QPIC 5
-#define SDX65_MASTER_SNOC_CFG 6
-#define SDX65_MASTER_SPMI_FETCHER 7
-#define SDX65_MASTER_ANOC_SNOC 8
-#define SDX65_MASTER_IPA 9
-#define SDX65_MASTER_MEM_NOC_SNOC 10
-#define SDX65_MASTER_MEM_NOC_PCIE_SNOC 11
-#define SDX65_MASTER_SNOC_GC_MEM_NOC 12
-#define SDX65_MASTER_CRYPTO 13
-#define SDX65_MASTER_APPSS_PROC 14
-#define SDX65_MASTER_IPA_PCIE 15
-#define SDX65_MASTER_PCIE_0 16
-#define SDX65_MASTER_QDSS_ETR 17
-#define SDX65_MASTER_SDCC_1 18
-#define SDX65_MASTER_USB3 19
-#define SDX65_SLAVE_EBI1 512
-#define SDX65_SLAVE_AOSS 513
-#define SDX65_SLAVE_APPSS 514
-#define SDX65_SLAVE_AUDIO 515
-#define SDX65_SLAVE_BLSP_1 516
-#define SDX65_SLAVE_CLK_CTL 517
-#define SDX65_SLAVE_CRYPTO_0_CFG 518
-#define SDX65_SLAVE_CNOC_DDRSS 519
-#define SDX65_SLAVE_ECC_CFG 520
-#define SDX65_SLAVE_IMEM_CFG 521
-#define SDX65_SLAVE_IPA_CFG 522
-#define SDX65_SLAVE_CNOC_MSS 523
-#define SDX65_SLAVE_PCIE_PARF 524
-#define SDX65_SLAVE_PDM 525
-#define SDX65_SLAVE_PRNG 526
-#define SDX65_SLAVE_QDSS_CFG 527
-#define SDX65_SLAVE_QPIC 528
-#define SDX65_SLAVE_SDCC_1 529
-#define SDX65_SLAVE_SNOC_CFG 530
-#define SDX65_SLAVE_SPMI_FETCHER 531
-#define SDX65_SLAVE_SPMI_VGI_COEX 532
-#define SDX65_SLAVE_TCSR 533
-#define SDX65_SLAVE_TLMM 534
-#define SDX65_SLAVE_USB3 535
-#define SDX65_SLAVE_USB3_PHY_CFG 536
-#define SDX65_SLAVE_ANOC_SNOC 537
-#define SDX65_SLAVE_LLCC 538
-#define SDX65_SLAVE_MEM_NOC_SNOC 539
-#define SDX65_SLAVE_SNOC_MEM_NOC_GC 540
-#define SDX65_SLAVE_MEM_NOC_PCIE_SNOC 541
-#define SDX65_SLAVE_IMEM 542
-#define SDX65_SLAVE_SERVICE_SNOC 543
-#define SDX65_SLAVE_PCIE_0 544
-#define SDX65_SLAVE_QDSS_STM 545
-#define SDX65_SLAVE_TCU 546
-
-#endif
--
2.39.5
Powered by blists - more mailing lists