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Message-ID: <20250616062541.7167-2-krzysztof.kozlowski@linaro.org>
Date: Mon, 16 Jun 2025 08:25:42 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
Melody Olvera <melody.olvera@....qualcomm.com>,
Wesley Cheng <quic_wcheng@...cinc.com>,
linux-arm-msm@...r.kernel.org,
linux-phy@...ts.infradead.org,
linux-kernel@...r.kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH] phy: qcom: qmp-combo: Add missing PLL (VCO) configuration on SM8750
Add missing DP PHY status and VCO clock configuration registers to fix
configuring the VCO rate on SM8750. Without proper VCO rate setting, it
works on after-reset half of rate which is not enough for DP over USB to
work as seen on logs:
[drm:msm_dp_ctrl_link_train_1_2] *ERROR* max v_level reached
[drm:msm_dp_ctrl_link_train_1_2] *ERROR* link training #1 on phy 0 failed. ret=-11
Fixes: c4364048baf4 ("phy: qcom: qmp-combo: Add new PHY sequences for SM8750")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 8b9710a9654a..f07d097b129f 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -228,6 +228,9 @@ static const unsigned int qmp_v8_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
[QPHY_COM_CMN_STATUS] = QSERDES_V8_COM_CMN_STATUS,
[QPHY_COM_BIAS_EN_CLKBUFLR_EN] = QSERDES_V8_COM_BIAS_EN_CLKBUFLR_EN,
+ [QPHY_DP_PHY_STATUS] = QSERDES_V6_DP_PHY_STATUS,
+ [QPHY_DP_PHY_VCO_DIV] = QSERDES_V6_DP_PHY_VCO_DIV,
+
[QPHY_TX_TX_POL_INV] = QSERDES_V8_TX_TX_POL_INV,
[QPHY_TX_TX_DRV_LVL] = QSERDES_V8_TX_TX_DRV_LVL,
[QPHY_TX_TX_EMP_POST1_LVL] = QSERDES_V8_TX_TX_EMP_POST1_LVL,
--
2.45.2
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