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Message-ID: <a01c10b7-859e-4eab-be8c-e486a97e6ad5@quicinc.com>
Date: Mon, 16 Jun 2025 18:28:36 +0530
From: Akhil P Oommen <quic_akhilpo@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Akhil P Oommen
<akhilpo@....qualcomm.com>,
Jens Glathe <jens.glathe@...schoolsolutions.biz>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
"Rob Clark" <robin.clark@....qualcomm.com>,
Sean Paul <sean@...rly.run>, "Konrad Dybcio" <konradybcio@...nel.org>,
Dmitry Baryshkov
<lumag@...nel.org>,
"Abhinav Kumar" <abhinav.kumar@...ux.dev>,
Jessica Zhang
<jessica.zhang@....qualcomm.com>,
Marijn Suijten
<marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, "Simona
Vetter" <simona@...ll.ch>,
Bjorn Andersson <andersson@...nel.org>, Rob
Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor
Dooley <conor+dt@...nel.org>, Viresh Kumar <vireshk@...nel.org>,
Nishanth
Menon <nm@...com>, Stephen Boyd <sboyd@...nel.org>
CC: <linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-msm@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
<freedreno@...ts.freedesktop.org>, <devicetree@...r.kernel.org>,
<linux-pm@...r.kernel.org>,
Dmitry Baryshkov
<dmitry.baryshkov@....qualcomm.com>
Subject: Re: [PATCH v2 0/4] Support for Adreno X1-45 GPU
On 6/15/2025 12:12 AM, Konrad Dybcio wrote:
> On 6/12/25 11:19 PM, Akhil P Oommen wrote:
>> On 6/12/2025 5:32 PM, Jens Glathe wrote:
>>> On 6/11/25 13:15, Akhil P Oommen wrote:
>>>
>>>> Add support for X1-45 GPU found in X1P41200 chipset (8 cpu core
>>>> version). X1-45 is a smaller version of X1-85 with lower core count and
>>>> smaller memories. From UMD perspective, this is similar to "FD735"
>>>> present in Mesa.
>>>>
>>> Hi Akhil,
>>>
>>> when loading the driver (still without firmware files) I'm getting a
>>> speedbin warning:
>>>
>>> [ 3.318341] adreno 3d00000.gpu: [drm:a6xx_gpu_init [msm]] *ERROR*
>>> missing support for speed-bin: 233. Some OPPs may not be supported by
>>> hardware
>>>
>>> I've seen that there is a table for speed bins, this one is not there.
>>> Tested on a Lenovo ThinkBook 16 G7 QOY.
>>
>> Hi Jens,
>>
>> Could you please try the below patch?
>>
>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
>> b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
>> index 2db748ce7df5..7748f92919b8 100644
>> --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
>> @@ -1510,7 +1510,8 @@ static const struct adreno_info a7xx_gpus[] = {
>> { 0, 0 },
>> { 294, 1 },
>> { 263, 2 },
>> - { 141, 3 },
>> + { 233, 3 },
>> + { 141, 4 },
>> ),
>> }
>> };
>>
>> With this, you should see 1107Mhz as the GPU Fmax.
>
> I see your dt entry takes care of bins 0..=4.. this oversight worries
> me a bit - are these values above (post change) all in sync with what
> you entered into DT?
Yes. DT is accurate. And with this additional change both the driver and
DT will be consistent.
-Akhil.
>
> I'm not saying they necessarily aren't, but I want to avoid
> inconsistencies
>
> Konrad
>
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