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Message-ID: <b7179ac8-c64b-44dd-b25a-62b34eb49c24@eltropuls.de>
Date: Tue, 17 Jun 2025 12:03:31 +0200
From: Marc Strämke <marc.straemke@...ropuls.de>
To: Sebastian Andrzej Siewior <bigeasy@...utronix.de>
Cc: linux-kernel@...r.kernel.org, linux-rt-users@...r.kernel.org
Subject: Re: Latency spikes on V6.15.1 Preempt RT and maybe related to intel?
IGB
Hi Sebastian,
On 17.06.25 12:00, Sebastian Andrzej Siewior wrote:
> Even if CPU1 would handle CPU0's timers then it would wake cyclictest on
> CPU0 but that thread would have to wake until CPU0 is done with the PCI
> bus. CPU1 knows nothing about it.
Okay then the latency I see on the other CPU must be from a PCI access
done by the second CPU which stall on the same shared bus.
Anyway: Thanks for your help Sebastian! I can probably live well with
these spikes in latency. I was more concerned that there is a deeper
issue with my config and the response time could be unbounded.
Marc
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