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Message-ID: <f8222e9e-0c0a-477a-be10-a340fb5fa4dd@linaro.org>
Date: Tue, 17 Jun 2025 08:00:57 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Vinod Koul <vkoul@...nel.org>
Cc: Kishon Vijay Abraham I <kishon@...nel.org>,
Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
Melody Olvera <melody.olvera@....qualcomm.com>,
Wesley Cheng <quic_wcheng@...cinc.com>, linux-arm-msm@...r.kernel.org,
linux-phy@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] phy: qcom: qmp-combo: Add missing PLL (VCO) configuration
on SM8750
On 16/06/2025 19:00, Vinod Koul wrote:
> On 16-06-25, 08:25, Krzysztof Kozlowski wrote:
>> Add missing DP PHY status and VCO clock configuration registers to fix
>> configuring the VCO rate on SM8750. Without proper VCO rate setting, it
>> works on after-reset half of rate which is not enough for DP over USB to
>> work as seen on logs:
>>
>> [drm:msm_dp_ctrl_link_train_1_2] *ERROR* max v_level reached
>> [drm:msm_dp_ctrl_link_train_1_2] *ERROR* link training #1 on phy 0 failed. ret=-11
>
> Hey,
>
> This does not apply for on phy/fixes
>
> Can you please rebase
That's not a phy/fixes. It is a patch for next, as pointed out by fixed
commit.
Best regards,
Krzysztof
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