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Message-ID: <5fc19e0e92ab9e68da097077367f0a9b5b59a343.camel@mediatek.com>
Date: Tue, 17 Jun 2025 06:06:55 +0000
From: CK Hu (胡俊光) <ck.hu@...iatek.com>
To: "robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
<krzk+dt@...nel.org>, Paul-pl Chen (陳柏霖)
<Paul-pl.Chen@...iatek.com>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>
CC: Sunny Shen (沈姍姍) <Sunny.Shen@...iatek.com>,
Sirius Wang (王皓昱) <Sirius.Wang@...iatek.com>,
Nancy Lin (林欣螢) <Nancy.Lin@...iatek.com>,
Xiandong Wang (王先冬)
<Xiandong.Wang@...iatek.com>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>, "dri-devel@...ts.freedesktop.org"
<dri-devel@...ts.freedesktop.org>, Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
"linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
Jason-JH Lin (林睿祥) <Jason-JH.Lin@...iatek.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"fshao@...omium.org" <fshao@...omium.org>, "p.zabel@...gutronix.de"
<p.zabel@...gutronix.de>, Singo Chang (張興國)
<Singo.Chang@...iatek.com>, "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, "matthias.bgg@...il.com"
<matthias.bgg@...il.com>, "treapking@...omium.org" <treapking@...omium.org>
Subject: Re: [PATCH v3 11/17] drm/mediatek: drm/mediatek: Export OVL ignore
pixel alpha function
On Thu, 2025-05-15 at 17:34 +0800, paul-pl.chen wrote:
> From: Nancy Lin <nancy.lin@...iatek.com>
>
> For the new BLENDER component, the OVL ignore pixel alpha logic
> should be exported as a function and reused it.
>
> Signed-off-by: Nancy Lin <nancy.lin@...iatek.com>
> Signed-off-by: Paul-pl Chen <paul-pl.chen@...iatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 24 ++++++++++++++++++++++--
> drivers/gpu/drm/mediatek/mtk_disp_ovl.h | 1 +
> 2 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index a516b7c82b5a..747898a574da 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -211,6 +211,23 @@ void mtk_ovl_disable_vblank(struct device *dev)
> writel_relaxed(0x0, ovl->regs + DISP_REG_OVL_INTEN);
> }
>
> +bool mtk_ovl_is_ignore_pixel_alpha(struct mtk_plane_state *state, unsigned int blend_mode)
> +{
> + if (!state->base.fb)
> + return false;
> + /*
> + * Although the alpha channel can be ignored, CONST_BLD must be enabled
> + * for XRGB format, otherwise OVL will still read the value from memory.
> + * For RGB888 related formats, whether CONST_BLD is enabled or not won't
> + * affect the result. Therefore we use !has_alpha as the condition.
> + */
> +
> + if (blend_mode == DRM_MODE_BLEND_PIXEL_NONE || !state->base.fb->format->has_alpha)
> + return true;
> +
> + return false;
> +}
> +
> u32 mtk_ovl_get_blend_modes(struct device *dev)
> {
> struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
> @@ -539,7 +556,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
> unsigned int rotation = pending->rotation;
> unsigned int offset = (pending->y << 16) | pending->x;
> unsigned int src_size = (pending->height << 16) | pending->width;
> - unsigned int blend_mode = state->base.pixel_blend_mode;
> + unsigned int blend_mode = mtk_ovl_get_blend_mode(state, ovl->data->blend_modes);
I would like previous patch is about color format and this patch is about alpha blend.
You add mtk_ovl_get_blend_mode() in previous patch.
So remove mtk_ovl_get_blend_mode() in previous patch and add it in this patch.
In original design, blend_mode is only changed in mtk_ovl_format_convert(),
but this patch chagne blend_mode in mtk_ovl_layer_config().
In order to keep original behavior,
In below, where using blend_mode is chagned to use state->base.pixel_blend_mode,
so it's not necessary to have a variable blend_mode.
Regards,
CK
> unsigned int ignore_pixel_alpha = 0;
> unsigned int con;
>
> @@ -557,7 +574,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
> * For blend_modes supported SoCs, always enable alpha blending.
> * For blend_modes unsupported SoCs, enable alpha blending when has_alpha is set.
> */
> - if (blend_mode || state->base.fb->format->has_alpha)
> + if (state->base.pixel_blend_mode || state->base.fb->format->has_alpha)
> con |= OVL_CON_AEN;
> }
>
> @@ -584,6 +601,9 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
>
> mtk_ddp_write_relaxed(cmdq_pkt, con, &ovl->cmdq_reg, ovl->regs,
> DISP_REG_OVL_CON(idx));
> +
> + if (mtk_ovl_is_ignore_pixel_alpha(state, blend_mode))
> + ignore_pixel_alpha = OVL_CONST_BLEND;
> mtk_ddp_write_relaxed(cmdq_pkt, pitch_lsb | ignore_pixel_alpha,
> &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_PITCH(idx));
> mtk_ddp_write_relaxed(cmdq_pkt, src_size, &ovl->cmdq_reg, ovl->regs,
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.h b/drivers/gpu/drm/mediatek/mtk_disp_ovl.h
> index 3f7d7d54479d..431567538eb5 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.h
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.h
> @@ -20,6 +20,7 @@ extern const u32 mt8195_ovl_formats[];
> extern const size_t mt8195_ovl_formats_len;
>
> bool mtk_ovl_is_10bit_rgb(unsigned int fmt);
> +bool mtk_ovl_is_ignore_pixel_alpha(struct mtk_plane_state *state, unsigned int blend_mode);
> unsigned int mtk_ovl_get_blend_mode(struct mtk_plane_state *state, unsigned int blend_modes);
> unsigned int mtk_ovl_fmt_convert(unsigned int fmt, unsigned int blend_mode,
> bool fmt_rgb565_is_0, bool color_convert,
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