Message-ID: <CAK9=C2VyPDXmQZa0=Wo9x2t1bN92XjiEuF2GH51-s5sgkupXAA@mail.gmail.com>
Date: Wed, 18 Jun 2025 10:20:50 +0530
From: Anup Patel <apatel@...tanamicro.com>
To: Atish Patra <atish.patra@...ux.dev>
Cc: Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Jassi Brar <jassisinghbrar@...il.com>, Thomas Gleixner <tglx@...utronix.de>, 
	"Rafael J . Wysocki" <rafael@...nel.org>, Mika Westerberg <mika.westerberg@...ux.intel.com>, 
	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>, 
	Linus Walleij <linus.walleij@...aro.org>, Bartosz Golaszewski <brgl@...ev.pl>, 
	Uwe Kleine-König <ukleinek@...nel.org>, 
	Palmer Dabbelt <palmer@...belt.com>, Paul Walmsley <paul.walmsley@...ive.com>, 
	Len Brown <lenb@...nel.org>, Sunil V L <sunilvl@...tanamicro.com>, 
	Rahul Pathak <rpathak@...tanamicro.com>, Leyfoon Tan <leyfoon.tan@...rfivetech.com>, 
	Andrew Jones <ajones@...tanamicro.com>, Samuel Holland <samuel.holland@...ive.com>, 
	Anup Patel <anup@...infault.org>, linux-clk@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 12/23] irqchip: Add driver for the RPMI system MSI
 service group

On Sat, Jun 14, 2025 at 4:37 AM Atish Patra <atish.patra@...ux.dev> wrote:
>
>
> On 6/10/25 11:22 PM, Anup Patel wrote:
> > The RPMI specification defines a system MSI service group which
> > allows application processors to receive MSIs upon system events
> > such as graceful shutdown/reboot request, CPU hotplug event, memory
> > hotplug event, etc.
> >
> > Add an irqchip driver for the RISC-V RPMI system MSI service group
> > to directly receive system MSIs in Linux kernel.
> >
> > Signed-off-by: Anup Patel <apatel@...tanamicro.com>
> > ---
> >   drivers/irqchip/Kconfig                    |   7 +
> >   drivers/irqchip/Makefile                   |   1 +
> >   drivers/irqchip/irq-riscv-rpmi-sysmsi.c    | 285 +++++++++++++++++++++
> >   include/linux/mailbox/riscv-rpmi-message.h |  13 +
> >   4 files changed, 306 insertions(+)
> >   create mode 100644 drivers/irqchip/irq-riscv-rpmi-sysmsi.c
> >
> > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> > index 0d196e447142..96bf6aa55681 100644
> > --- a/drivers/irqchip/Kconfig
> > +++ b/drivers/irqchip/Kconfig
> > @@ -617,6 +617,13 @@ config RISCV_IMSIC
> >       select GENERIC_MSI_IRQ
> >       select IRQ_MSI_LIB
> >
> > +config RISCV_RPMI_SYSMSI
> > +     bool
> > +     depends on MAILBOX
> > +     select IRQ_DOMAIN_HIERARCHY
> > +     select GENERIC_MSI_IRQ
> > +     default RISCV
> > +
> >   config SIFIVE_PLIC
> >       bool
> >       depends on RISCV
> > diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
> > index 23ca4959e6ce..4fd966aa78ab 100644
> > --- a/drivers/irqchip/Makefile
> > +++ b/drivers/irqchip/Makefile
> > @@ -103,6 +103,7 @@ obj-$(CONFIG_RISCV_INTC)          += irq-riscv-intc.o
> >   obj-$(CONFIG_RISCV_APLIC)           += irq-riscv-aplic-main.o irq-riscv-aplic-direct.o
> >   obj-$(CONFIG_RISCV_APLIC_MSI)               += irq-riscv-aplic-msi.o
> >   obj-$(CONFIG_RISCV_IMSIC)           += irq-riscv-imsic-state.o irq-riscv-imsic-early.o irq-riscv-imsic-platform.o
> > +obj-$(CONFIG_RISCV_RPMI_SYSMSI)              += irq-riscv-rpmi-sysmsi.o
> >   obj-$(CONFIG_SIFIVE_PLIC)           += irq-sifive-plic.o
> >   obj-$(CONFIG_STARFIVE_JH8100_INTC)  += irq-starfive-jh8100-intc.o
> >   obj-$(CONFIG_THEAD_C900_ACLINT_SSWI)        += irq-thead-c900-aclint-sswi.o
> > diff --git a/drivers/irqchip/irq-riscv-rpmi-sysmsi.c b/drivers/irqchip/irq-riscv-rpmi-sysmsi.c
> > new file mode 100644
> > index 000000000000..06f64936802a
> > --- /dev/null
> > +++ b/drivers/irqchip/irq-riscv-rpmi-sysmsi.c
> > @@ -0,0 +1,285 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/* Copyright (C) 2025 Ventana Micro Systems Inc. */
> > +
> > +#include <linux/bits.h>
> > +#include <linux/bug.h>
> > +#include <linux/device.h>
> > +#include <linux/device/devres.h>
> > +#include <linux/dev_printk.h>
> > +#include <linux/errno.h>
> > +#include <linux/irq.h>
> > +#include <linux/irqdomain.h>
> > +#include <linux/mailbox_client.h>
> > +#include <linux/mailbox/riscv-rpmi-message.h>
> > +#include <linux/module.h>
> > +#include <linux/msi.h>
> > +#include <linux/of_irq.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/types.h>
> > +
> > +struct rpmi_sysmsi_get_attrs_rx {
> > +     __le32 status;
> > +     __le32 sys_num_msi;
> > +     __le32 flag0;
> > +     __le32 flag1;
> > +};
> > +
> > +#define RPMI_SYSMSI_MSI_ATTRIBUTES_FLAG0_PREF_PRIV   BIT(0)
> > +
> > +struct rpmi_sysmsi_set_msi_state_tx {
> > +     __le32 sys_msi_index;
> > +     __le32 sys_msi_state;
> > +};
> > +
> > +struct rpmi_sysmsi_set_msi_state_rx {
> > +     __le32 status;
> > +};
> > +
> > +#define RPMI_SYSMSI_MSI_STATE_ENABLE                 BIT(0)
> > +#define RPMI_SYSMSI_MSI_STATE_PENDING                        BIT(1)
> > +
> > +struct rpmi_sysmsi_set_msi_target_tx {
> > +     __le32 sys_msi_index;
> > +     __le32 sys_msi_address_low;
> > +     __le32 sys_msi_address_high;
> > +     __le32 sys_msi_data;
> > +};
> > +
> > +struct rpmi_sysmsi_set_msi_target_rx {
> > +     __le32 status;
> > +};
> > +
> > +struct rpmi_sysmsi_priv {
> > +     struct device           *dev;
> > +     struct mbox_client      client;
> > +     struct mbox_chan        *chan;
> > +     u32                     nr_irqs;
> > +     u32                     gsi_base;
> > +};
> > +
> > +static int rpmi_sysmsi_get_num_msi(struct rpmi_sysmsi_priv *priv)
> > +{
> > +     struct rpmi_sysmsi_get_attrs_rx rx;
> > +     struct rpmi_mbox_message msg;
> > +     int ret;
> > +
> > +     rpmi_mbox_init_send_with_response(&msg, RPMI_SYSMSI_SRV_GET_ATTRIBUTES,
> > +                                       NULL, 0, &rx, sizeof(rx));
> > +     ret = rpmi_mbox_send_message(priv->chan, &msg);
> > +     if (ret)
> > +             return ret;
> > +     if (rx.status)
> > +             return rpmi_to_linux_error(le32_to_cpu(rx.status));
> > +
> > +     return le32_to_cpu(rx.sys_num_msi);
> > +}
> > +
> > +static int rpmi_sysmsi_set_msi_state(struct rpmi_sysmsi_priv *priv,
> > +                                  u32 sys_msi_index, u32 sys_msi_state)
> > +{
> > +     struct rpmi_sysmsi_set_msi_state_tx tx;
> > +     struct rpmi_sysmsi_set_msi_state_rx rx;
> > +     struct rpmi_mbox_message msg;
> > +     int ret;
> > +
> > +     tx.sys_msi_index = cpu_to_le32(sys_msi_index);
> > +     tx.sys_msi_state = cpu_to_le32(sys_msi_state);
> > +     rpmi_mbox_init_send_with_response(&msg, RPMI_SYSMSI_SRV_SET_MSI_STATE,
> > +                                       &tx, sizeof(tx), &rx, sizeof(rx));
> > +     ret = rpmi_mbox_send_message(priv->chan, &msg);
> > +     if (ret)
> > +             return ret;
> > +     if (rx.status)
> > +             return rpmi_to_linux_error(le32_to_cpu(rx.status));
> > +
> > +     return 0;
> > +}
> > +
> > +static int rpmi_sysmsi_set_msi_target(struct rpmi_sysmsi_priv *priv,
> > +                                   u32 sys_msi_index, struct msi_msg *m)
> > +{
> > +     struct rpmi_sysmsi_set_msi_target_tx tx;
> > +     struct rpmi_sysmsi_set_msi_target_rx rx;
> > +     struct rpmi_mbox_message msg;
> > +     int ret;
> > +
> > +     tx.sys_msi_index = cpu_to_le32(sys_msi_index);
> > +     tx.sys_msi_address_low = cpu_to_le32(m->address_lo);
> > +     tx.sys_msi_address_high = cpu_to_le32(m->address_hi);
> > +     tx.sys_msi_data = cpu_to_le32(m->data);
> > +     rpmi_mbox_init_send_with_response(&msg, RPMI_SYSMSI_SRV_SET_MSI_TARGET,
> > +                                       &tx, sizeof(tx), &rx, sizeof(rx));
> > +     ret = rpmi_mbox_send_message(priv->chan, &msg);
> > +     if (ret)
> > +             return ret;
> > +     if (rx.status)
> > +             return rpmi_to_linux_error(le32_to_cpu(rx.status));
> > +
> > +     return 0;
> > +}
> > +
> > +static void rpmi_sysmsi_irq_mask(struct irq_data *d)
> > +{
> > +     struct rpmi_sysmsi_priv *priv = irq_data_get_irq_chip_data(d);
> > +     irq_hw_number_t hwirq = irqd_to_hwirq(d);
> > +     int ret;
> > +
> > +     ret = rpmi_sysmsi_set_msi_state(priv, hwirq, 0);
> > +     if (ret)
> > +             dev_warn(priv->dev, "Failed to mask hwirq %lu (error %d)\n", hwirq, ret);
> > +     irq_chip_mask_parent(d);
> > +}
> > +
> > +static void rpmi_sysmsi_irq_unmask(struct irq_data *d)
> > +{
> > +     struct rpmi_sysmsi_priv *priv = irq_data_get_irq_chip_data(d);
> > +     irq_hw_number_t hwirq = irqd_to_hwirq(d);
> > +     int ret;
> > +
> > +     irq_chip_unmask_parent(d);
> > +     ret = rpmi_sysmsi_set_msi_state(priv, hwirq, RPMI_SYSMSI_MSI_STATE_ENABLE);
> > +     if (ret)
> > +             dev_warn(priv->dev, "Failed to unmask hwirq %lu (error %d)\n", hwirq, ret);
> > +}
> > +
> > +static void rpmi_sysmsi_write_msg(struct irq_data *d, struct msi_msg *msg)
> > +{
> > +     struct rpmi_sysmsi_priv *priv = irq_data_get_irq_chip_data(d);
> > +     irq_hw_number_t hwirq = irqd_to_hwirq(d);
> > +     int ret;
> > +
> > +     /* For zeroed MSI, do nothing as of now */
> > +     if (!msg->address_hi && !msg->address_lo && !msg->data)
> > +             return;
> > +
> > +     ret = rpmi_sysmsi_set_msi_target(priv, hwirq, msg);
> > +     if (ret) {
> > +             dev_warn(priv->dev, "Failed to set target for hwirq %lu (error %d)\n",
> > +                      hwirq, ret);
> > +     }
> > +}
> > +
> > +static void rpmi_sysmsi_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
> > +{
> > +     arg->desc = desc;
> > +     arg->hwirq = desc->data.icookie.value;
> > +}
> > +
> > +static int rpmi_sysmsi_translate(struct irq_domain *d, struct irq_fwspec *fwspec,
> > +                              unsigned long *hwirq, unsigned int *type)
> > +{
> > +     struct msi_domain_info *info = d->host_data;
> > +     struct rpmi_sysmsi_priv *priv = info->data;
> > +
> > +     if (WARN_ON(fwspec->param_count < 1))
> > +             return -EINVAL;
> > +
> > +     /* For DT, gsi_base is always zero. */
> > +     *hwirq = fwspec->param[0] - priv->gsi_base;
> > +     *type = IRQ_TYPE_NONE;
>
> Why do we set the type to IRQ_TYPE_NONE ?
> Either we shouldn't care about the type here  or edge type as it is only
> MSI driver.

Setting type to IRQ_TYPE_NONE is inspired from the generic
irq_domain_translate_onecell() implementation in kernel/irq/irqdomain.c

> We also throw a warning for user if the any other irq type is passed in
> msi_translate call back.

The #interrupt-cells is 1 for sysmsi driver so we don't even look
at fwspec->param[1] hence no need for any warning.

>
> > +     return 0;
> > +}
> > +
> > +static const struct msi_domain_template rpmi_sysmsi_template = {
> > +     .chip = {
> > +             .name                   = "RPMI-SYSMSI",
> > +             .irq_mask               = rpmi_sysmsi_irq_mask,
> > +             .irq_unmask             = rpmi_sysmsi_irq_unmask,
> > +#ifdef CONFIG_SMP
> > +             .irq_set_affinity       = irq_chip_set_affinity_parent,
> > +#endif
> > +             .irq_write_msi_msg      = rpmi_sysmsi_write_msg,
> > +             .flags                  = IRQCHIP_SET_TYPE_MASKED |
> > +                                       IRQCHIP_SKIP_SET_WAKE |
> > +                                       IRQCHIP_MASK_ON_SUSPEND,
> > +     },
> > +
> > +     .ops = {
> > +             .set_desc               = rpmi_sysmsi_set_desc,
> > +             .msi_translate          = rpmi_sysmsi_translate,
> > +     },
> > +
> > +     .info = {
> > +             .bus_token              = DOMAIN_BUS_WIRED_TO_MSI,
> > +             .flags                  = MSI_FLAG_USE_DEV_FWNODE,
> > +             .handler                = handle_simple_irq,
> > +             .handler_name           = "simple",
> > +     },
> > +};
> > +
> > +static int rpmi_sysmsi_probe(struct platform_device *pdev)
> > +{
> > +     struct device *dev = &pdev->dev;
> > +     struct rpmi_sysmsi_priv *priv;
> > +     int rc;
> > +
> > +     priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> > +     if (!priv)
> > +             return -ENOMEM;
> > +     priv->dev = dev;
> > +
> > +     /* Setup mailbox client */
> > +     priv->client.dev                = priv->dev;
> > +     priv->client.rx_callback        = NULL;
> > +     priv->client.tx_block           = false;
> > +     priv->client.knows_txdone       = true;
> > +     priv->client.tx_tout            = 0;
> > +
> > +     /* Request mailbox channel */
> > +     priv->chan = mbox_request_channel(&priv->client, 0);
> > +     if (IS_ERR(priv->chan))
> > +             return PTR_ERR(priv->chan);
> > +
> > +     /* Get number of system MSIs */
> > +     rc = rpmi_sysmsi_get_num_msi(priv);
> > +     if (rc < 1) {
> > +             mbox_free_channel(priv->chan);
> > +             if (rc)
> > +                     return dev_err_probe(dev, rc, "Failed to get number of system MSIs\n");
> > +             else
> > +                     return dev_err_probe(dev, -ENODEV, "No system MSIs found\n");
> > +     }
> > +     priv->nr_irqs = rc;
> > +
> > +     /* Set the device MSI domain if not available */
> > +     if (!dev_get_msi_domain(dev)) {
> > +             /*
> > +              * The device MSI domain for OF devices is only set at the
> > +              * time of populating/creating OF device. If the device MSI
> > +              * domain is discovered later after the OF device is created
> > +              * then we need to set it explicitly before using any platform
> > +              * MSI functions.
> > +              */
> > +             if (dev_of_node(dev))
> > +                     of_msi_configure(dev, dev_of_node(dev));
> > +
> > +             if (!dev_get_msi_domain(dev)) {
> > +                     mbox_free_channel(priv->chan);
> > +                     return -EPROBE_DEFER;
> > +             }
> > +     }
> > +
> > +     if (!msi_create_device_irq_domain(dev, MSI_DEFAULT_DOMAIN,
> > +                                       &rpmi_sysmsi_template,
> > +                                       priv->nr_irqs, priv, priv)) {
> > +             mbox_free_channel(priv->chan);
> > +             return dev_err_probe(dev, -ENOMEM, "failed to create MSI irq domain\n");
> > +     }
> > +
> > +     dev_info(dev, "%u system MSIs registered\n", priv->nr_irqs);
> > +     return 0;
> > +}
> > +
> > +static const struct of_device_id rpmi_sysmsi_match[] = {
> > +     { .compatible = "riscv,rpmi-system-msi" },
> > +     {}
> > +};
> > +
> > +static struct platform_driver rpmi_sysmsi_driver = {
> > +     .driver = {
> > +             .name           = "rpmi-sysmsi",
> > +             .of_match_table = rpmi_sysmsi_match,
> > +     },
> > +     .probe = rpmi_sysmsi_probe,
> > +};
> > +builtin_platform_driver(rpmi_sysmsi_driver);
> > diff --git a/include/linux/mailbox/riscv-rpmi-message.h b/include/linux/mailbox/riscv-rpmi-message.h
> > index 476a2d64d972..06d2f8b38969 100644
> > --- a/include/linux/mailbox/riscv-rpmi-message.h
> > +++ b/include/linux/mailbox/riscv-rpmi-message.h
> > @@ -91,6 +91,7 @@ static inline int rpmi_to_linux_error(int rpmi_error)
> >   }
> >
> >   /* RPMI service group IDs */
> > +#define RPMI_SRVGRP_SYSTEM_MSI               0x00002
> >   #define RPMI_SRVGRP_CLOCK           0x00008
> >
> >   /* RPMI clock service IDs */
> > @@ -106,6 +107,18 @@ enum rpmi_clock_service_id {
> >       RPMI_CLK_SRV_ID_MAX_COUNT
> >   };
> >
> > +/* RPMI system MSI service IDs */
> > +enum rpmi_sysmsi_service_id {
> > +     RPMI_SYSMSI_SRV_ENABLE_NOTIFICATION = 0x01,
> > +     RPMI_SYSMSI_SRV_GET_ATTRIBUTES = 0x02,
> > +     RPMI_SYSMSI_SRV_GET_MSI_ATTRIBUTES = 0x03,
> > +     RPMI_SYSMSI_SRV_SET_MSI_STATE = 0x04,
> > +     RPMI_SYSMSI_SRV_GET_MSI_STATE = 0x05,
> > +     RPMI_SYSMSI_SRV_SET_MSI_TARGET = 0x06,
> > +     RPMI_SYSMSI_SRV_GET_MSI_TARGET = 0x07,
> > +     RPMI_SYSMSI_SRV_ID_MAX_COUNT
> > +};
> > +
> >   /* RPMI Linux mailbox attribute IDs */
> >   enum rpmi_mbox_attribute_id {
> >       RPMI_MBOX_ATTR_SPEC_VERSION,

Regards,
Anup

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