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Message-Id: <20250618074848.3898532-1-hongxing.zhu@nxp.com>
Date: Wed, 18 Jun 2025 15:48:47 +0800
From: Richard Zhu <hongxing.zhu@....com>
To: frank.li@....com,
l.stach@...gutronix.de,
lpieralisi@...nel.org,
kwilczynski@...nel.org,
mani@...nel.org,
robh@...nel.org,
bhelgaas@...gle.com,
shawnguo@...nel.org,
s.hauer@...gutronix.de,
kernel@...gutronix.de,
festevam@...il.com
Cc: linux-pci@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
imx@...ts.linux.dev,
linux-kernel@...r.kernel.org,
Richard Zhu <hongxing.zhu@....com>
Subject: [PATCH v1 1/2] dt-binding: pci-imx6: Add external reference clock mode support
On i.MX, the PCIe reference clock might come from either internal
system PLL or external clock source.
Add the external reference clock source for reference clock.
Signed-off-by: Richard Zhu <hongxing.zhu@....com>
---
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index ca5f2970f217..4b99fa8e7a25 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -219,7 +219,12 @@ allOf:
- const: pcie_bus
- const: pcie_phy
- const: pcie_aux
- - const: ref
+ - description: PCIe reference clock.
+ oneOf:
+ - description: The controller might be configured clocking
+ coming in from either an internal system PLL or an
+ external clock source.
+ enum: [ref, gio]
unevaluatedProperties: false
--
2.37.1
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