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Message-ID: <20250618080931.2472366-3-sai.krishna.musham@amd.com>
Date: Wed, 18 Jun 2025 13:39:31 +0530
From: Sai Krishna Musham <sai.krishna.musham@....com>
To: <bhelgaas@...gle.com>, <lpieralisi@...nel.org>, <kw@...ux.com>,
<mani@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
<conor+dt@...nel.org>, <cassel@...nel.org>
CC: <linux-pci@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <michal.simek@....com>,
<bharat.kumar.gogada@....com>, <thippeswamy.havalige@....com>,
<sai.krishna.musham@....com>
Subject: [PATCH v3 2/2] PCI: amd-mdb: Add support for PCIe RP PERST# signal handling
Add GPIO based PERST# signal handling for AMD Versal Gen 2 MDB
PCIe Root Port.
Signed-off-by: Sai Krishna Musham <sai.krishna.musham@....com>
---
Changes in v3:
- Implement amd_mdb_parse_pcie_port to parse bridge node for reset-gpios property.
Changes in v2:
- Change delay to PCIE_T_PVPERL_MS
---
drivers/pci/controller/dwc/pcie-amd-mdb.c | 45 ++++++++++++++++++++++-
1 file changed, 44 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pcie-amd-mdb.c b/drivers/pci/controller/dwc/pcie-amd-mdb.c
index 4eb2a4e8189d..b4c5b71900a5 100644
--- a/drivers/pci/controller/dwc/pcie-amd-mdb.c
+++ b/drivers/pci/controller/dwc/pcie-amd-mdb.c
@@ -18,6 +18,7 @@
#include <linux/resource.h>
#include <linux/types.h>
+#include "../../pci.h"
#include "pcie-designware.h"
#define AMD_MDB_TLP_IR_STATUS_MISC 0x4C0
@@ -63,6 +64,7 @@ struct amd_mdb_pcie {
void __iomem *slcr;
struct irq_domain *intx_domain;
struct irq_domain *mdb_domain;
+ struct gpio_desc *perst_gpio;
int intx_irq;
};
@@ -284,7 +286,7 @@ static int amd_mdb_pcie_init_irq_domains(struct amd_mdb_pcie *pcie,
struct device_node *pcie_intc_node;
int err;
- pcie_intc_node = of_get_next_child(node, NULL);
+ pcie_intc_node = of_get_child_by_name(node, "interrupt-controller");
if (!pcie_intc_node) {
dev_err(dev, "No PCIe Intc node found\n");
return -ENODEV;
@@ -402,6 +404,34 @@ static int amd_mdb_setup_irq(struct amd_mdb_pcie *pcie,
return 0;
}
+static int amd_mdb_parse_pcie_port(struct amd_mdb_pcie *pcie)
+{
+ struct device *dev = pcie->pci.dev;
+ struct device_node *pcie_port_node;
+
+ pcie_port_node = of_get_next_child_with_prefix(dev->of_node, NULL, "pcie");
+ if (!pcie_port_node) {
+ dev_err(dev, "No PCIe Bridge node found\n");
+ return -ENODEV;
+ }
+
+ /* Request the GPIO for PCIe reset signal and assert */
+ pcie->perst_gpio = devm_fwnode_gpiod_get(dev, of_fwnode_handle(pcie_port_node),
+ "reset", GPIOD_OUT_HIGH, NULL);
+ if (IS_ERR(pcie->perst_gpio)) {
+ if (PTR_ERR(pcie->perst_gpio) != -ENOENT) {
+ of_node_put(pcie_port_node);
+ return dev_err_probe(dev, PTR_ERR(pcie->perst_gpio),
+ "Failed to request reset GPIO\n");
+ }
+ pcie->perst_gpio = NULL;
+ }
+
+ of_node_put(pcie_port_node);
+
+ return 0;
+}
+
static int amd_mdb_add_pcie_port(struct amd_mdb_pcie *pcie,
struct platform_device *pdev)
{
@@ -426,6 +456,14 @@ static int amd_mdb_add_pcie_port(struct amd_mdb_pcie *pcie,
pp->ops = &amd_mdb_pcie_host_ops;
+ if (pcie->perst_gpio) {
+ mdelay(PCIE_T_PVPERL_MS);
+
+ /* Deassert the reset signal */
+ gpiod_set_value_cansleep(pcie->perst_gpio, 0);
+ mdelay(PCIE_T_RRS_READY_MS);
+ }
+
err = dw_pcie_host_init(pp);
if (err) {
dev_err(dev, "Failed to initialize host, err=%d\n", err);
@@ -444,6 +482,7 @@ static int amd_mdb_pcie_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct amd_mdb_pcie *pcie;
struct dw_pcie *pci;
+ int ret;
pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
if (!pcie)
@@ -454,6 +493,10 @@ static int amd_mdb_pcie_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, pcie);
+ ret = amd_mdb_parse_pcie_port(pcie);
+ if (ret)
+ return ret;
+
return amd_mdb_add_pcie_port(pcie, pdev);
}
--
2.43.0
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