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Message-ID:
<TYSPR06MB7068B3600E9EC3E8A33D92969572A@TYSPR06MB7068.apcprd06.prod.outlook.com>
Date: Wed, 18 Jun 2025 01:34:35 +0000
From: Cool Lee <cool_lee@...eedtech.com>
To: Philipp Zabel <p.zabel@...gutronix.de>, "andrew@...econstruct.com.au"
<andrew@...econstruct.com.au>, "adrian.hunter@...el.com"
<adrian.hunter@...el.com>, "ulf.hansson@...aro.org" <ulf.hansson@...aro.org>,
"joel@....id.au" <joel@....id.au>, "linux-aspeed@...ts.ozlabs.org"
<linux-aspeed@...ts.ozlabs.org>, "openbmc@...ts.ozlabs.org"
<openbmc@...ts.ozlabs.org>, "linux-mmc@...r.kernel.org"
<linux-mmc@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>, BMC-SW <BMC-SW@...eedtech.com>
Subject: RE: [PATCH 1/8] mmc: sdhci-of-aspeed: Fix sdhci software reset can't
be cleared issue.
> > Replace sdhci software reset by scu reset from top.
> >
> > Signed-off-by: Cool Lee <cool_lee@...eedtech.com>
> > ---
> > drivers/mmc/host/sdhci-of-aspeed.c | 55
> > +++++++++++++++++++++++++++++-
> > 1 file changed, 54 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/mmc/host/sdhci-of-aspeed.c
> > b/drivers/mmc/host/sdhci-of-aspeed.c
> > index d6de010551b9..01bc574272eb 100644
> > --- a/drivers/mmc/host/sdhci-of-aspeed.c
> > +++ b/drivers/mmc/host/sdhci-of-aspeed.c
> > @@ -13,6 +13,7 @@
> > #include <linux/of.h>
> > #include <linux/of_platform.h>
> > #include <linux/platform_device.h>
> > +#include <linux/reset.h>
> > #include <linux/spinlock.h>
> >
> > #include "sdhci-pltfm.h"
> > @@ -39,6 +40,7 @@
> > struct aspeed_sdc {
> > struct clk *clk;
> > struct resource *res;
> > + struct reset_control *rst;
> >
> > spinlock_t lock;
> > void __iomem *regs;
> > @@ -328,13 +330,58 @@ static u32 aspeed_sdhci_readl(struct sdhci_host
> *host, int reg)
> > return val;
> > }
> >
> > +static void aspeed_sdhci_reset(struct sdhci_host *host, u8 mask) {
> > + struct sdhci_pltfm_host *pltfm_priv;
> > + struct aspeed_sdhci *aspeed_sdhci;
> > + struct aspeed_sdc *aspeed_sdc;
> > + u32 save_array[7];
> > + u32 reg_array[] = {SDHCI_DMA_ADDRESS,
> > + SDHCI_BLOCK_SIZE,
> > + SDHCI_ARGUMENT,
> > + SDHCI_HOST_CONTROL,
> > + SDHCI_CLOCK_CONTROL,
> > + SDHCI_INT_ENABLE,
> > + SDHCI_SIGNAL_ENABLE};
> > + int i;
> > + u16 tran_mode;
> > + u32 mmc8_mode;
> > +
> > + pltfm_priv = sdhci_priv(host);
> > + aspeed_sdhci = sdhci_pltfm_priv(pltfm_priv);
> > + aspeed_sdc = aspeed_sdhci->parent;
> > +
> > + if (!IS_ERR(aspeed_sdc->rst)) {
> > + for (i = 0; i < ARRAY_SIZE(reg_array); i++)
> > + save_array[i] = sdhci_readl(host, reg_array[i]);
> > +
> > + tran_mode = sdhci_readw(host, SDHCI_TRANSFER_MODE);
> > + mmc8_mode = readl(aspeed_sdc->regs);
> > +
> > + reset_control_assert(aspeed_sdc->rst);
> > + mdelay(1);
> > + reset_control_deassert(aspeed_sdc->rst);
> > + mdelay(1);
>
> Why are there delays here ...
Ok, I will remove from here. From hardware's perspective, the delay is not needed.
>
> [...]
> > @@ -535,6 +582,12 @@ static int aspeed_sdc_probe(struct
> > platform_device *pdev)
> >
> > spin_lock_init(&sdc->lock);
> >
> > + sdc->rst = devm_reset_control_get(&pdev->dev, NULL);
> > + if (!IS_ERR(sdc->rst)) {
> > + reset_control_assert(sdc->rst);
> > + reset_control_deassert(sdc->rst);
>
> ... but not here?
>
> regards
> Philipp
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