linux-kernel - Re: [PATCH v2 2/2] x86/traps: Initialize DR7 by writing its architectural reset value

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Message-ID: <1b8095a8-1e65-4508-b874-fa2fce1b00ee@zytor.com>
Date: Tue, 17 Jun 2025 17:15:18 -0700
From: Xin Li <xin@...or.com>
To: Sean Christopherson <seanjc@...gle.com>
Cc: linux-kernel@...r.kernel.org, kvm@...r.kernel.org, tglx@...utronix.de,
        mingo@...hat.com, bp@...en8.de, dave.hansen@...ux.intel.com,
        x86@...nel.org, hpa@...or.com, pbonzini@...hat.com,
        peterz@...radead.org, sohil.mehta@...el.com, brgerst@...il.com,
        tony.luck@...el.com, fenghuay@...dia.com
Subject: Re: [PATCH v2 2/2] x86/traps: Initialize DR7 by writing its
 architectural reset value

On 6/17/2025 4:08 PM, Xin Li wrote:
> 
> I hope the bit will be kept reserved to 1 *forever*, because inverted
> polarity seems causing confusing and complicated code only.

BTW, FRED flipped BLD and RTM polarities in its event data:

The event data is not exactly the same as that which will be in DR6
following delivery of the #DB. The polarity of bit 11 (BLD) and bit 16
(RTM) is inverted in DR6.


I.e., BLD and RTM are active high in FRED event data.