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Message-ID: <CACRpkdb9OkfBS49zjo38L_0zouz2SJmfJK3EaH+YZMPqXacODw@mail.gmail.com>
Date: Wed, 18 Jun 2025 13:57:36 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Bartosz Golaszewski <brgl@...ev.pl>
Cc: Bjorn Andersson <andersson@...nel.org>, linux-arm-msm@...r.kernel.org,
linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
Bartosz Golaszewski <bartosz.golaszewski@...aro.org>, stable@...r.kernel.org
Subject: Re: [PATCH v2] pinctrl: qcom: msm: mark certain pins as invalid for interrupts
On Thu, Jun 12, 2025 at 11:14 AM Bartosz Golaszewski <brgl@...ev.pl> wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
>
> On some platforms, the UFS-reset pin has no interrupt logic in TLMM but
> is nevertheless registered as a GPIO in the kernel. This enables the
> user-space to trigger a BUG() in the pinctrl-msm driver by running, for
> example: `gpiomon -c 0 113` on RB2.
>
> The exact culprit is requesting pins whose intr_detection_width setting
> is not 1 or 2 for interrupts. This hits a BUG() in
> msm_gpio_irq_set_type(). Potentially crashing the kernel due to an
> invalid request from user-space is not optimal, so let's go through the
> pins and mark those that would fail the check as invalid for the irq chip
> as we should not even register them as available irqs.
>
> This function can be extended if we determine that there are more
> corner-cases like this.
>
> Fixes: f365be092572 ("pinctrl: Add Qualcomm TLMM driver")
> Cc: stable@...r.kernel.org
> Reviewed-by: Bjorn Andersson <andersson@...nel.org>
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
Patch applied for fixes!
Yours,
Linus Walleij
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