linux-kernel - Re: [PATCH 6/7] pinctrl: aspeed-g6: Add PCIe RC PERST pin group

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Message-ID: <CACRpkdaX24z5YsfcrB2oqbZpdexZJNREGkWiYgq1ar0c8O0QBA@mail.gmail.com>
Date: Wed, 18 Jun 2025 14:15:23 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Jacky Chou <jacky_chou@...eedtech.com>
Cc: bhelgaas@...gle.com, lpieralisi@...nel.org, kwilczynski@...nel.org, 
	mani@...nel.org, robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, 
	joel@....id.au, andrew@...econstruct.com.au, vkoul@...nel.org, 
	kishon@...nel.org, p.zabel@...gutronix.de, linux-aspeed@...ts.ozlabs.org, 
	linux-pci@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, 
	linux-phy@...ts.infradead.org, openbmc@...ts.ozlabs.org, 
	linux-gpio@...r.kernel.org, elbadrym@...gle.com, romlem@...gle.com, 
	anhphan@...gle.com, wak@...gle.com, yuxiaozhang@...gle.com, 
	BMC-SW@...eedtech.com
Subject: Re: [PATCH 6/7] pinctrl: aspeed-g6: Add PCIe RC PERST pin group

On Fri, Jun 13, 2025 at 5:30 AM Jacky Chou <jacky_chou@...eedtech.com> wrote:

> The PCIe RC PERST uses SSPRST# as PERST#  and enable this pin
> to output.
>
> Signed-off-by: Jacky Chou <jacky_chou@...eedtech.com>

Acked-by: Linus Walleij <linus.walleij@...aro.org>

Can I just apply this patch 6/7 in isolation from the others, to
the pin control tree?

Yours,
Linus Walleij