linux-kernel - [PATCH 0/8] Enhance Winbond SPI NAND support

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Message-Id: <20250618-winbond-6-16-rc1-octal-phy-upstream-v1-0-513202126013@bootlin.com>
Date: Wed, 18 Jun 2025 14:14:17 +0200
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Mark Brown <broonie@...nel.org>, Richard Weinberger <richard@....at>, 
 Vignesh Raghavendra <vigneshr@...com>
Cc: Yogesh S <yogeshs@...com>, Santhosh Kumar K <s-k6@...com>, 
 Steam Lin <STLin2@...bond.com>, 
 Thomas Petazzoni <thomas.petazzoni@...tlin.com>, linux-spi@...r.kernel.org, 
 linux-kernel@...r.kernel.org, linux-mtd@...ts.infradead.org, 
 Miquel Raynal <miquel.raynal@...tlin.com>
Subject: [PATCH 0/8] Enhance Winbond SPI NAND support

Both w25n**jw and w35n**jw chips have a "normal" and a "high speed"
mode. In order to use the high speed modes, we need to configure
internal registers and adapt the number of dummy cycles. The benefits
are too interesting for not paying attention to this little extra
configuration. In particular, it is an important building block for the
introduction of PHY calibration on TI SPI controllers. With these
changes combined, the frequency used on these chips can be bumped from
~25MHz up to 166MHz.

This series was tested on TI AM62A SK with a W35N01JW and on Nuvoton
MA35D with a W25N01JW. At low speeds, this series does not bring any
improvement. However when enabling high speed modes (on TI's platform),
the difference is outstanding:

W35N*JW running in 1S-8S-8S @ 25MHz:

	 eraseblock read speed is 9552 KiB/s
	 page read speed is 9516 KiB/s
	 2 page read speed is 9552 KiB/s

W35N*JW running in 1S-8S-8S @ 166MHz:

	eraseblock read speed is 35555 KiB/s
	page read speed is 33684 KiB/s
	2 page read speed is 35068 KiB/s

Enabling high speeds currently requires applying extra patches from TI
to enable PHY calibration. They are currently in the upstreaming process.

Link: https://github.com/miquelraynal/linux/tree/winbond/6.16-rc1/octal-phy

In order to introduce all these variants and derive the quickest one, I
had to improve a bit the helper deriving the time an ops would
take. These changes can go through the spi tree, the other patches do
not depend on them and the performance hit is rather acceptable without.

While at adding maximum operation frequencies, I realized I got myself
confused with the macro parameters due to some of them being
optional (with variable arguments in macros). I decided it was too error
prone so I propose to add these values on all READ_FROM_CACHE
variants (where they are often relevant).

Signed-off-by: Miquel Raynal <miquel.raynal@...tlin.com>
---
Miquel Raynal (8):
      spi: spi-mem: Use picoseconds for calculating the op durations
      spi: spi-mem: Take into account the actual maximum frequency
      mtd: spinand: Fix macro alignment
      mtd: spinand: Add a frequency field to all READ_FROM_CACHE variants
      mtd: spinand: Add a ->configure_chip() hook
      mtd: spinand: winbond: Enable high-speed modes on w25n0xjw
      mtd: spinand: winbond: Enable high-speed modes on w35n0xjw
      mtd: spinand: winbond: Add comment about the maximum frequency

 drivers/mtd/nand/spi/alliancememory.c |  12 +--
 drivers/mtd/nand/spi/ato.c            |   6 +-
 drivers/mtd/nand/spi/core.c           |  22 +++--
 drivers/mtd/nand/spi/esmt.c           |   8 +-
 drivers/mtd/nand/spi/foresee.c        |   8 +-
 drivers/mtd/nand/spi/gigadevice.c     |  48 +++++-----
 drivers/mtd/nand/spi/macronix.c       |   8 +-
 drivers/mtd/nand/spi/micron.c         |  20 ++---
 drivers/mtd/nand/spi/paragon.c        |  12 +--
 drivers/mtd/nand/spi/skyhigh.c        |  12 +--
 drivers/mtd/nand/spi/toshiba.c        |   8 +-
 drivers/mtd/nand/spi/winbond.c        | 163 ++++++++++++++++++++++++++++++----
 drivers/mtd/nand/spi/xtx.c            |  12 +--
 drivers/spi/spi-mem.c                 |  27 ++++--
 include/linux/mtd/spinand.h           |  70 +++++++++------
 include/linux/spi/spi-mem.h           |   2 +-
 16 files changed, 308 insertions(+), 130 deletions(-)
---
base-commit: 065b897a1044b1c67ba4d1066ee090097bae1499
change-id: 20250613-winbond-6-16-rc1-octal-phy-upstream-c8929842ed21

Best regards,
-- 
Miquel Raynal <miquel.raynal@...tlin.com>