linux-kernel - Re: [PATCH v5 2/2] perf: Fujitsu: Add the Uncore PCI PMU driver

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <aFQXU5rK_HJE9zq0@J2N7QTR9R3>
Date: Thu, 19 Jun 2025 14:57:55 +0100
From: Mark Rutland <mark.rutland@....com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Koichi Okuno <fj2767dz@...itsu.com>, Will Deacon <will@...nel.org>,
	Jonathan Corbet <corbet@....net>,
	Catalin Marinas <catalin.marinas@....com>,
	linux-arm-kernel@...ts.infradead.org,
	Bjorn Andersson <quic_bjorande@...cinc.com>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
	Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
	Konrad Dybcio <konradybcio@...nel.org>,
	Neil Armstrong <neil.armstrong@...aro.org>,
	Arnd Bergmann <arnd@...db.de>,
	Nícolas F. R. A. Prado <nfraprado@...labora.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Jonathan Cameron <Jonathan.Cameron@...wei.com>,
	linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 2/2] perf: Fujitsu: Add the Uncore PCI PMU driver

On Tue, Jun 17, 2025 at 12:36:18PM +0200, Peter Zijlstra wrote:
> On Tue, Jun 17, 2025 at 07:27:50PM +0900, Koichi Okuno wrote:
> > +	pcipmu->pmu = (struct pmu) {
> > +		.parent		= dev,
> > +		.task_ctx_nr	= perf_invalid_context,
> > +
> > +		.pmu_enable	= fujitsu_pci__pmu_enable,
> > +		.pmu_disable	= fujitsu_pci__pmu_disable,
> > +		.event_init	= fujitsu_pci__event_init,
> > +		.add		= fujitsu_pci__event_add,
> > +		.del		= fujitsu_pci__event_del,
> > +		.start		= fujitsu_pci__event_start,
> > +		.stop		= fujitsu_pci__event_stop,
> > +		.read		= fujitsu_pci__event_read,
> > +
> > +		.attr_groups	= fujitsu_pci_pmu_attr_grps,
> > +		.capabilities	= PERF_PMU_CAP_NO_EXCLUDE,
> 
> Should these drivers not also have PERF_PMU_CAP_NO_INTERRUPT ? Per them
> being uncore they cannot generate samples.

These PMUs actually have an interrupt, so that might be a bit confusing.
That said, the counters seem to be 64-bit, so the interrupt doesn't seem
practically necessary today.

Either way, the fujitsu_pci__event_init() function rejects sampling
events, so it correctly rejects sampling events.

IMO, it'd be a bit nicer to do the inverse, and have the perf core
reject sampling events by default for non-CPU PMUs.

Mark.