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Message-ID: <aFPDkFUEE4BzdJh/@hu-qianyu-lv.qualcomm.com>
Date: Thu, 19 Jun 2025 01:00:16 -0700
From: Qiang Yu <qiang.yu@....qualcomm.com>
To: Manivannan Sadhasivam <mani@...nel.org>
Cc: Konrad Dybcio <konradybcio@...nel.org>, krishna.chundru@....qualcomm.com,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof Wilczyński <kwilczynski@...nel.org>,
        Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Qiang Yu <quic_qianyu@...cinc.com>,
        Ziyue Zhang <quic_ziyuzhan@...cinc.com>,
        Marijn Suijten <marijn.suijten@...ainline.org>,
        linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: Re: [PATCH 1/4] dt-bindings: PCI: qcom,pcie-sc8180x: Drop unrelated
 clocks from PCIe hosts

On Fri, Jun 13, 2025 at 02:43:38PM +0530, Manivannan Sadhasivam wrote:
> + Krishna
> 
> On Wed, May 21, 2025 at 03:38:10PM +0200, Konrad Dybcio wrote:
> > From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
> > 
> > The TBU clock belongs to the Translation Buffer Unit, part of the SMMU.
> > The ref clock is already being driven upstream through some of the
> > branches.
> > 
> 
> Can you please cross check with the hardware programming guide (I don't have
> access to atm) that the 'ref' clock is no longer voted by the driver?
>

CLKREF is required for PHY. Since it has been voted in PCIe PHY driver,
omitting it here is reasonable.

- Qiang Yu

> - Mani
> 
> > Signed-off-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
> > ---
> >  .../devicetree/bindings/pci/qcom,pcie-sc8180x.yaml         | 14 ++++----------
> >  1 file changed, 4 insertions(+), 10 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml
> > index 331fc25d7a17d657d4db3863f0c538d0e44dc840..34a4d7b2c8459aeb615736f54c1971014adb205f 100644
> > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml
> > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml
> > @@ -33,8 +33,8 @@ properties:
> >        - const: mhi # MHI registers
> >  
> >    clocks:
> > -    minItems: 8
> > -    maxItems: 8
> > +    minItems: 6
> > +    maxItems: 6
> >  
> >    clock-names:
> >      items:
> > @@ -44,8 +44,6 @@ properties:
> >        - const: bus_master # Master AXI clock
> >        - const: bus_slave # Slave AXI clock
> >        - const: slave_q2a # Slave Q2A clock
> > -      - const: ref # REFERENCE clock
> > -      - const: tbu # PCIe TBU clock
> >  
> >    interrupts:
> >      minItems: 8
> > @@ -117,17 +115,13 @@ examples:
> >                       <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
> >                       <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
> >                       <&gcc GCC_PCIE_0_SLV_AXI_CLK>,
> > -                     <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>,
> > -                     <&gcc GCC_PCIE_0_CLKREF_CLK>,
> > -                     <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
> > +                     <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>;
> >              clock-names = "pipe",
> >                            "aux",
> >                            "cfg",
> >                            "bus_master",
> >                            "bus_slave",
> > -                          "slave_q2a",
> > -                          "ref",
> > -                          "tbu";
> > +                          "slave_q2a";
> >  
> >              dma-coherent;
> >  
> > 
> > -- 
> > 2.49.0
> > 
> 
> -- 
> மணிவண்ணன் சதாசிவம்
> 

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