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Message-ID: <073c293c-325c-484e-b843-80e254716d7c@oss.qualcomm.com>
Date: Thu, 19 Jun 2025 13:34:48 +0530
From: Mohammad Rafi Shaik <mohammad.rafi.shaik@....qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, quic_pkumpatl@...cinc.com,
        kernel@....qualcomm.com
Subject: Re: [PATCH v2 2/2] arm64: dts: qcom: qcs9075-evk: Add sound card



On 6/16/2025 4:54 PM, Dmitry Baryshkov wrote:
> On 16/06/2025 10:04, Mohammad Rafi Shaik wrote:
>> Add the sound card node with tested playback over max98357a
>> I2S speakers amplifier and I2S mic.
>>
>> Introduce HS (High-Speed) MI2S pin control support.
>> The I2S max98357a speaker amplifier is connected via HS0 and I2S
>> microphones utilize the HS2 interface.
>>
>> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@....qualcomm.com>
>> ---
>>   .../boot/dts/qcom/qcs9075-iq-9075-evk.dts     | 52 +++++++++++++++++++
>>   arch/arm64/boot/dts/qcom/sa8775p.dtsi         | 14 +++++
>>   2 files changed, 66 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts b/arch/ 
>> arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts
>> index ab161180d1d5..d073c6f95d4c 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts
>> +++ b/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts
>> @@ -5,6 +5,7 @@
>>   /dts-v1/;
>>   #include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/sound/qcom,q6afe.h>
>>   #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
>>   #include "qcs9075.dtsi"
>> @@ -21,6 +22,57 @@ aliases {
>>       chosen {
>>           stdout-path = "serial0:115200n8";
>>       };
>> +
>> +    max98357a: audio-codec-0 {
> 
> This wasn't sorted out properly.
>

Ack, will take care in next version.

>> +        compatible = "maxim,max98357a";
> 
> No SD_MODE pin?
> 
Yes, SD_MODE pin is always on in this specific qcs9075-iq-evk board hw.

No need to handle.

>> +        #sound-dai-cells = <0>;
>> +    };
>> +
>> +    dmic: audio-codec-1 {
>> +        compatible = "dmic-codec";
>> +        #sound-dai-cells = <0>;
>> +        num-channels = <1>;
> 
> no enable GPIO, no vref-supply?

On qcs9075-iq-evk boards the enable gpios and vref-spply is always on.
Not configurable from DT.

Thanks & best regards,
Rafi.
> 
>> +    };
>> +
>> +    sound {
>> +        compatible = "qcom,qcs9075-sndcard";
>> +        model = "qcs9075-iq-evk-snd-card";
>> +
>> +        pinctrl-0 = <&hs0_mi2s_active>, <&hs2_mi2s_active>;
>> +        pinctrl-names = "default";
>> +
>> +        hs0-mi2s-playback-dai-link {
>> +            link-name = "HS0 mi2s playback";
>> +
>> +            codec {
>> +                sound-dai = <&max98357a>;
>> +            };
>> +
>> +            cpu {
>> +                sound-dai = <&q6apmbedai PRIMARY_MI2S_RX>;
>> +            };
>> +
>> +            platform {
>> +                sound-dai = <&q6apm>;
>> +            };
>> +        };
>> +
>> +        hs2-mi2s-capture-dai-link {
>> +            link-name = "HS2 mi2s capture";
>> +
>> +            codec {
>> +                sound-dai = <&dmic>;
>> +            };
>> +
>> +            cpu {
>> +                sound-dai = <&q6apmbedai TERTIARY_MI2S_TX>;
>> +            };
>> +
>> +            platform {
>> +                sound-dai = <&q6apm>;
>> +            };
>> +        };
>> +    };
>>   };
>>   &apps_rsc {
>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/ 
>> dts/qcom/sa8775p.dtsi
>> index 07ca6dd4f759..968730da180d 100644
>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>> @@ -4711,6 +4711,20 @@ tlmm: pinctrl@...0000 {
>>               gpio-ranges = <&tlmm 0 0 149>;
>>               wakeup-parent = <&pdc>;
>> +            hs0_mi2s_active: hs0-mi2s-active-state {
>> +                pins = "gpio114", "gpio115", "gpio116", "gpio117";
>> +                function = "hs0_mi2s";
>> +                drive-strength = <8>;
>> +                bias-disable;
>> +            };
>> +
>> +            hs2_mi2s_active: hs2-mi2s-active-state {
>> +                pins = "gpio122", "gpio123", "gpio124", "gpio125";
>> +                function = "hs2_mi2s";
>> +                drive-strength = <8>;
>> +                bias-disable;
>> +            };
>> +
>>               qup_i2c0_default: qup-i2c0-state {
>>                   pins = "gpio20", "gpio21";
>>                   function = "qup0_se0";
> 
> 


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