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Message-ID: <aFQAQlB6gG3CElcN@pollux>
Date: Thu, 19 Jun 2025 14:19:14 +0200
From: Danilo Krummrich <dakr@...nel.org>
To: Michal Wilczynski <m.wilczynski@...sung.com>
Cc: Uwe Kleine-König <ukleinek@...nel.org>,
Miguel Ojeda <ojeda@...nel.org>,
Alex Gaynor <alex.gaynor@...il.com>,
Boqun Feng <boqun.feng@...il.com>, Gary Guo <gary@...yguo.net>,
Björn Roy Baron <bjorn3_gh@...tonmail.com>,
Andreas Hindborg <a.hindborg@...nel.org>,
Alice Ryhl <aliceryhl@...gle.com>, Trevor Gross <tmgross@...ch.edu>,
Drew Fustini <drew@...7.com>, Guo Ren <guoren@...nel.org>,
Fu Wei <wefu@...hat.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>,
Marek Szyprowski <m.szyprowski@...sung.com>,
Benno Lossin <lossin@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, linux-kernel@...r.kernel.org,
linux-pwm@...r.kernel.org, rust-for-linux@...r.kernel.org,
linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
linux-clk@...r.kernel.org
Subject: Re: [PATCH v4 4/9] pwm: Add Rust driver for T-HEAD TH1520 SoC
On Wed, Jun 18, 2025 at 02:27:37PM +0200, Michal Wilczynski wrote:
<snip>
> + fn write_waveform(
> + chip: &pwm::Chip,
> + pwm: &pwm::Device,
> + wfhw: &Self::WfHw,
> + parent_dev: &Device<Bound>,
> + ) -> Result {
> + let data: &Self = chip.drvdata().ok_or(EINVAL)?;
<snip>
> +impl platform::Driver for Th1520PwmPlatformDriver {
> + type IdInfo = ();
> + const OF_ID_TABLE: Option<of::IdTable<Self::IdInfo>> = Some(&OF_TABLE);
> +
> + fn probe(
> + pdev: &platform::Device<Core>,
> + _id_info: Option<&Self::IdInfo>,
> + ) -> Result<Pin<KBox<Self>>> {
> + let dev = pdev.as_ref();
> + let resource = pdev.resource(0).ok_or(ENODEV)?;
> + let iomem = pdev.ioremap_resource_sized::<TH1520_PWM_REG_SIZE>(resource)?;
> + let clk = Clk::get(pdev.as_ref(), None)?;
> +
> + clk.prepare_enable()?;
> +
> + // TODO: Get exclusive ownership of the clock to prevent rate changes.
> + // The Rust equivalent of `clk_rate_exclusive_get()` is not yet available.
> + // This should be updated once it is implemented.
> + let rate_hz = clk.rate().as_hz();
> + if rate_hz == 0 {
> + dev_err!(dev, "Clock rate is zero\n");
> + return Err(EINVAL);
> + }
> +
> + if rate_hz > time::NSEC_PER_SEC as usize {
> + dev_err!(
> + dev,
> + "Clock rate {} Hz is too high, not supported.\n",
> + rate_hz
> + );
> + return Err(ERANGE);
> + }
> +
> + let chip = pwm::Chip::new(dev, MAX_PWM_NUM, 0)?;
> +
> + let drvdata = KBox::new(Th1520PwmDriverData { iomem, clk }, GFP_KERNEL)?;
> + chip.set_drvdata(drvdata);
Sorry that I didn't spot this before: Is there a reason you can't pass drvdata
directly to pwm::Chip::new()?
If not, you can initialize the pwm::Chip's drvdata on creation of the pwm::Chip.
This has the advantage that your chip.drvdata() (see write_waveform() above)
becomes infallible.
(If there are reasons this isn't possible, there are other potential solutions
to avoid chip.drvdata() to return an Option.)
> +
> + pwm::Registration::new_foreign_owned(dev, chip, &TH1520_PWM_OPS)?;
> +
> + Ok(KBox::new(Th1520PwmPlatformDriver, GFP_KERNEL)?.into())
> + }
> +}
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