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Message-ID:
 <SEYPR06MB51343F38D4F9C130A4CE3FED9D7CA@SEYPR06MB5134.apcprd06.prod.outlook.com>
Date: Fri, 20 Jun 2025 05:24:39 +0000
From: Jacky Chou <jacky_chou@...eedtech.com>
To: Bjorn Helgaas <helgaas@...nel.org>
CC: "bhelgaas@...gle.com" <bhelgaas@...gle.com>, "lpieralisi@...nel.org"
	<lpieralisi@...nel.org>, "kwilczynski@...nel.org" <kwilczynski@...nel.org>,
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	"linux-aspeed@...ts.ozlabs.org" <linux-aspeed@...ts.ozlabs.org>,
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	"yuxiaozhang@...gle.com" <yuxiaozhang@...gle.com>, BMC-SW
	<BMC-SW@...eedtech.com>
Subject:
 回覆: [PATCH 5/7] ARM: dts: aspeed-g6: Add PCIe RC node

> > +				resets = <&syscon ASPEED_RESET_H2X>,
> > +					 <&syscon ASPEED_RESET_PCIE_RC_O>;
> > +				reset-names = "h2x", "perst";
> 
> PERST# is clearly a per-Root Port item since it's a signal on the PCIe connector.
> Can you separate this and any other per-Root Port things into a Root Port
> stanza to leave open the possibility of future hardware that supports multiple
> Root Ports in the RC?

The PCIe RC that designed by us is only one root port.

Thanks,
Jacky

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