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Message-Id: <DAR846ZKJENY.KINMYGVYAY97@fairphone.com>
Date: Fri, 20 Jun 2025 10:39:10 +0200
From: "Luca Weiss" <luca.weiss@...rphone.com>
To: "Casey Connolly" <casey.connolly@...aro.org>, "Sebastian Reichel"
<sre@...nel.org>, "Rob Herring" <robh@...nel.org>, "Krzysztof Kozlowski"
<krzk+dt@...nel.org>, "Conor Dooley" <conor+dt@...nel.org>, "Bjorn
Andersson" <andersson@...nel.org>, "Konrad Dybcio"
<konradybcio@...nel.org>, "Kees Cook" <kees@...nel.org>, "Gustavo A. R.
Silva" <gustavoars@...nel.org>, "Bryan O'Donoghue"
<bryan.odonoghue@...aro.org>
Cc: <linux-arm-msm@...r.kernel.org>, <linux-pm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>, "Sebastian
Reichel" <sebastian.reichel@...labora.com>,
<linux-hardening@...r.kernel.org>
Subject: Re: [PATCH 09/11] power: supply: qcom_smbx: add smb5 support
Hi Casey!
Adding a note here, I also plan to look into what (if any) changes are
necessary for this to work on PMI632 (which is the PMIC for
sdm632/msm8953 Fairphone 3) since that's also SMB5.
On Thu Jun 19, 2025 at 4:55 PM CEST, Casey Connolly wrote:
> Introduce support for the SMB5 charger found on pm8150b and other more
> modern Qualcomm SoCs.
>
> SMB5 is largely similar to SMB2, with a few register differences. The
> main difference is the new Type-C hardware block which some registers
> are moved to.
>
> Signed-off-by: Casey Connolly <casey.connolly@...aro.org>
> ---
> drivers/power/supply/qcom_smbx.c | 367 +++++++++++++++++++++++++++++++++------
> 1 file changed, 314 insertions(+), 53 deletions(-)
<snip>
> +/* Bits 2:0 match PMI8998 TYPE_C_INTRPT_ENB_SOFTWARE_CTRL */
> +#define SMB5_TYPE_C_MODE_CFG 0x544
> +#define SMB5_EN_TRY_SNK_BIT BIT(4)
> +#define SMB5_EN_SNK_ONLY_BIT BIT(1)
> +
> +#define SMB5_TYPEC_TYPE_C_VCONN_CONTROL 0x546
> +#define SMB5_VCONN_EN_ORIENTATION_BIT BIT(2)
> +#define SMB5_VCONN_EN_VALUE_BIT BIT(1)
> +#define SMB5_VCONN_EN_SRC_BIT BIT(0)
> +
> +
> +#define SMB5_TYPE_C_DEBUG_ACCESS_SINK 0x54a
> +#define SMB5_TYPEC_DEBUG_ACCESS_SINK_MASK GENMASK(4, 0)
> +
> +#define SMB5_DEBUG_ACCESS_SRC_CFG 0x54C
> +#define SMB5_EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT BIT(0)
> +
> +#define SMB5_TYPE_C_EXIT_STATE_CFG 0x550
> +#define SMB5_BYPASS_VSAFE0V_DURING_ROLE_SWAP_BIT BIT(3)
> +#define SMB5_SEL_SRC_UPPER_REF_BIT BIT(2)
> +#define SMB5_EXIT_SNK_BASED_ON_CC_BIT BIT(0)
<snip>
> /* Init sequence derived from vendor downstream driver */
> -static const struct smb_init_register smb_init_seq[] = {
> - { .addr = AICL_RERUN_TIME_CFG, .mask = AICL_RERUN_TIME_MASK, .val = 0 },
> +static const struct smb_init_register smb5_init_seq[] = {
> + { .addr = USBIN_CMD_IL, .mask = USBIN_SUSPEND_BIT, .val = 0 },
> + /*
> + * By default configure us as an upstream facing port
> + * FIXME: This will be handled by the type-c driver
> + */
> + { .addr = SMB5_TYPE_C_MODE_CFG,
> + .mask = SMB5_EN_TRY_SNK_BIT | SMB5_EN_SNK_ONLY_BIT,
> + .val = SMB5_EN_TRY_SNK_BIT },
Since there's already a driver for the Type-C in pm8150b and pm7250b,
can we remove this? Or is additional plumbing between the two drivers
necessary to make this work? Maybe Bryan can also jump in here.
Regards
Luca
> + { .addr = SMB5_TYPEC_TYPE_C_VCONN_CONTROL,
> + .mask = SMB5_VCONN_EN_ORIENTATION_BIT | SMB5_VCONN_EN_SRC_BIT |
> + SMB5_VCONN_EN_VALUE_BIT,
> + .val = SMB2_VCONN_EN_SRC_BIT },
> + { .addr = SMB5_DEBUG_ACCESS_SRC_CFG,
> + .mask = SMB5_EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT,
> + .val = SMB5_EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT },
> + { .addr = SMB5_TYPE_C_EXIT_STATE_CFG,
> + .mask = SMB5_SEL_SRC_UPPER_REF_BIT,
> + .val = SMB5_SEL_SRC_UPPER_REF_BIT },
> + /*
> + * Disable Type-C factory mode and stay in Attached.SRC state when VCONN
> + * over-current happens
> + */
> + { .addr = TYPE_C_CFG,
> + .mask = APSD_START_ON_CC_BIT,
> + .val = 0 },
> + { .addr = SMB5_TYPE_C_DEBUG_ACCESS_SINK,
> + .mask = SMB5_TYPEC_DEBUG_ACCESS_SINK_MASK,
> + .val = 0x17 },
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