linux-kernel - Re: [PATCH 2/5] RISC-V: KVM: Allow Zicbop extension for Guest/VM

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Message-Id: <655ef636-704d-4a6d-9de7-5eb44282af42@lanxincomputing.com>
Date: Fri, 20 Jun 2025 17:40:06 +0800
From: "Nutty Liu" <liujingqi@...xincomputing.com>
To: <zhouquan@...as.ac.cn>, <anup@...infault.org>, <ajones@...tanamicro.com>, 
	<atishp@...shpatra.org>, <paul.walmsley@...ive.com>, 
	<palmer@...belt.com>
Cc: <linux-kernel@...r.kernel.org>, <linux-riscv@...ts.infradead.org>, 
	<kvm@...r.kernel.org>, <kvm-riscv@...ts.infradead.org>
Subject: Re: [PATCH 2/5] RISC-V: KVM: Allow Zicbop extension for Guest/VM

On 6/17/2025 9:10 PM, zhouquan@...as.ac.cn wrote:
> From: Quan Zhou <zhouquan@...as.ac.cn>
>
> Extend the KVM ISA extension ONE_REG interface to allow KVM user space
> to detect and enable Zicbop extension for Guest/VM.
>
> Signed-off-by: Quan Zhou <zhouquan@...as.ac.cn>
> ---
>   arch/riscv/include/uapi/asm/kvm.h | 1 +
>   arch/riscv/kvm/vcpu_onereg.c      | 2 ++
>   2 files changed, 3 insertions(+)
>
> diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
> index 0863ca178066..56959d277e86 100644
> --- a/arch/riscv/include/uapi/asm/kvm.h
> +++ b/arch/riscv/include/uapi/asm/kvm.h
> @@ -185,6 +185,7 @@ enum KVM_RISCV_ISA_EXT_ID {
>   	KVM_RISCV_ISA_EXT_ZICCRSE,
>   	KVM_RISCV_ISA_EXT_ZAAMO,
>   	KVM_RISCV_ISA_EXT_ZALRSC,
> +	KVM_RISCV_ISA_EXT_ZICBOP,
>   	KVM_RISCV_ISA_EXT_MAX,
>   };
>   
> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
> index b08a22eaa7a7..d444ec9e9e8e 100644
> --- a/arch/riscv/kvm/vcpu_onereg.c
> +++ b/arch/riscv/kvm/vcpu_onereg.c
> @@ -68,6 +68,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
>   	KVM_ISA_EXT_ARR(ZFH),
>   	KVM_ISA_EXT_ARR(ZFHMIN),
>   	KVM_ISA_EXT_ARR(ZICBOM),
> +	KVM_ISA_EXT_ARR(ZICBOP),
>   	KVM_ISA_EXT_ARR(ZICBOZ),
>   	KVM_ISA_EXT_ARR(ZICCRSE),
>   	KVM_ISA_EXT_ARR(ZICNTR),
> @@ -171,6 +172,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
>   	case KVM_RISCV_ISA_EXT_ZFA:
>   	case KVM_RISCV_ISA_EXT_ZFH:
>   	case KVM_RISCV_ISA_EXT_ZFHMIN:
> +	case KVM_RISCV_ISA_EXT_ZICBOP:
>   	case KVM_RISCV_ISA_EXT_ZICCRSE:
>   	case KVM_RISCV_ISA_EXT_ZICNTR:
>   	case KVM_RISCV_ISA_EXT_ZICOND:

Seems 'RISCV_ISA_EXT_ZICBOP' should be declared in 'arch/riscv/include/asm/hwcap.h' ?
Otherwise,
Reviewed-by: Nutty Liu<liujingqi@...xincomputing.com>

Thanks,
Nutty