[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <34c871c9-3367-4b62-b2f8-11ed7d3482e5@collabora.com>
Date: Fri, 20 Jun 2025 11:54:48 +0200
From: Benjamin Gaignard <benjamin.gaignard@...labora.com>
To: Sebastian Reichel <sebastian.reichel@...labora.com>
Cc: joro@...tes.org, will@...nel.org, robin.murphy@....com, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, heiko@...ech.de,
nicolas.dufresne@...labora.com, jgg@...pe.ca, iommu@...ts.linux.dev,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
kernel@...labora.com
Subject: Re: [PATCH v3 2/5] dt-bindings: iommu: verisilicon: Add binding for
VSI IOMMU
Le 19/06/2025 à 16:19, Sebastian Reichel a écrit :
> Hi,
>
> On Thu, Jun 19, 2025 at 03:12:23PM +0200, Benjamin Gaignard wrote:
>> +properties:
>> + compatible:
>> + items:
>> + - const: verisilicon,iommu
>> + - const: rockchip,rk3588-iommu-1.2
> The entries should be ordered the other way around, so that the
> "generic" compatible is the fallback. Also the 1.2 version is from
> Verisilicon. It does not really make sense for Rockchip. So I
> think it should look like this:
>
> properties:
> compatible:
> items:
> - const: rockchip,rk3588-av1-iommu
> - const: verisilicon,iommu-1.2
>
> Otherwise LGTM.
Thanks I will do like that.
Regards,
Benjamin
>
> -- Sebastian
>
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + interrupts:
>> + maxItems: 1
>> +
>> + clocks:
>> + items:
>> + - description: Core clock
>> + - description: Interface clock
>> +
>> + clock-names:
>> + items:
>> + - const: core
>> + - const: iface
>> +
>> + "#iommu-cells":
>> + const: 0
>> +
>> + power-domains:
>> + maxItems: 1
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - interrupts
>> + - clocks
>> + - clock-names
>> + - "#iommu-cells"
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/clock/rockchip,rk3588-cru.h>
>> + #include <dt-bindings/interrupt-controller/arm-gic.h>
>> +
>> + bus {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> +
>> + iommu@...a0000 {
>> + compatible = "verisilicon,iommu","rockchip,rk3588-iommu-1.2";
>> + reg = <0x0 0xfdca0000 0x0 0x600>;
>> + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>;
>> + clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>;
>> + clock-names = "core", "iface";
>> + #iommu-cells = <0>;
>> + };
>> + };
>> --
>> 2.43.0
>>
Powered by blists - more mailing lists