lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20250620134132.5195-7-kylehendrydev@gmail.com>
Date: Fri, 20 Jun 2025 06:41:21 -0700
From: Kyle Hendry <kylehendrydev@...il.com>
To: Florian Fainelli <florian.fainelli@...adcom.com>,
	Andrew Lunn <andrew@...n.ch>,
	Vladimir Oltean <olteanv@...il.com>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>,
	Paolo Abeni <pabeni@...hat.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Russell King <linux@...linux.org.uk>
Cc: noltari@...il.com,
	jonas.gorski@...il.com,
	Kyle Hendry <kylehendrydev@...il.com>,
	Florian Fainelli <f.fainelli@...il.com>,
	netdev@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [RFC PATCH net-next 6/6] net: dsa: b53: mmap: Implement bcm63xx ephy power control

Implement the phy enable/disable calls for b53 mmap, and
set the power down registers in the ephy control register
appropriately.

Signed-off-by: Kyle Hendry <kylehendrydev@...il.com>
---
 drivers/net/dsa/b53/b53_mmap.c | 50 ++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/drivers/net/dsa/b53/b53_mmap.c b/drivers/net/dsa/b53/b53_mmap.c
index a4a2f2965bcc..cf34a7d1048f 100644
--- a/drivers/net/dsa/b53/b53_mmap.c
+++ b/drivers/net/dsa/b53/b53_mmap.c
@@ -29,6 +29,7 @@
 #include "b53_priv.h"
 
 #define BCM63XX_EPHY_REG 0x3C
+#define BCM63XX_EPHY_POWER_DOWN_BIAS BIT(24)
 
 struct b53_phy_info {
 	u32 chip_id;
@@ -264,6 +265,53 @@ static void bcm63xx_ephy_reset(struct regmap *regmap, int num_ephy)
 	regmap_update_bits(regmap, BCM63XX_EPHY_REG, mask, mask);
 }
 
+static void bcm63xx_ephy_set(struct b53_device *dev, int port, bool enable)
+{
+	struct b53_mmap_priv *priv = dev->priv;
+	const struct b53_phy_info *info = priv->phy_info;
+	u32 val, mask;
+	int i;
+
+	if (enable) {
+		val = 0;
+		mask = (info->mask << info->ephy_offset[port])
+				| BCM63XX_EPHY_POWER_DOWN_BIAS;
+		regmap_update_bits(priv->gpio_ctrl, BCM63XX_EPHY_REG, mask, val);
+	} else {
+		if (!regmap_read(priv->gpio_ctrl, BCM63XX_EPHY_REG, &val)) {
+			val |= info->mask << info->ephy_offset[port];
+			/*Check if all phys are full off and set bias bit*/
+			for (i = 0; i < info->num_ephy; i++) {
+				mask = info->mask << info->ephy_offset[i];
+				if ((val & mask) != mask)
+					break;
+			}
+
+			if (i == info->num_ephy)
+				val |= BCM63XX_EPHY_POWER_DOWN_BIAS;
+
+			/*Might need a lock around the read/write*/
+			regmap_write(priv->gpio_ctrl, BCM63XX_EPHY_REG, val);
+		}
+	}
+}
+
+static void b53_mmap_phy_enable(struct b53_device *dev, int port)
+{
+	struct b53_mmap_priv *priv = dev->priv;
+
+	if (priv->phy_info && port < priv->phy_info->num_ephy)
+		bcm63xx_ephy_set(dev, port, true);
+}
+
+static void b53_mmap_phy_disable(struct b53_device *dev, int port)
+{
+	struct b53_mmap_priv *priv = dev->priv;
+
+	if (priv->phy_info && port < priv->phy_info->num_ephy)
+		bcm63xx_ephy_set(dev, port, false);
+}
+
 static const struct b53_io_ops b53_mmap_ops = {
 	.read8 = b53_mmap_read8,
 	.read16 = b53_mmap_read16,
@@ -277,6 +325,8 @@ static const struct b53_io_ops b53_mmap_ops = {
 	.write64 = b53_mmap_write64,
 	.phy_read16 = b53_mmap_phy_read16,
 	.phy_write16 = b53_mmap_phy_write16,
+	.phy_enable = b53_mmap_phy_enable,
+	.phy_disable = b53_mmap_phy_disable,
 };
 
 static int b53_mmap_probe_of(struct platform_device *pdev,
-- 
2.43.0


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ