linux-kernel - Re: [PATCHv6 07/16] x86/vsyscall: Reorganize the #PF emulation code

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <c290a3cb-1cec-4aa3-969c-8fba504eb3d1@citrix.com>
Date: Mon, 23 Jun 2025 13:46:20 +0100
From: Andrew Cooper <andrew.cooper3@...rix.com>
To: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
 Dave Hansen <dave.hansen@...el.com>
Cc: acme@...hat.com, aik@....com, akpm@...ux-foundation.org,
 alexander.shishkin@...ux.intel.com, ardb@...nel.org, ast@...nel.org,
 bp@...en8.de, brijesh.singh@....com, changbin.du@...wei.com,
 christophe.leroy@...roup.eu, corbet@....net, daniel.sneddon@...ux.intel.com,
 dave.hansen@...ux.intel.com, ebiggers@...gle.com, geert+renesas@...der.be,
 houtao1@...wei.com, hpa@...or.com, jgg@...pe.ca, jgross@...e.com,
 jpoimboe@...nel.org, kai.huang@...el.com, kees@...nel.org,
 leitao@...ian.org, linux-doc@...r.kernel.org, linux-efi@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-mm@...ck.org, linux@...musvillemoes.dk,
 luto@...nel.org, mcgrof@...nel.org, mhiramat@...nel.org,
 michael.roth@....com, mingo@...nel.org, mingo@...hat.com,
 namhyung@...nel.org, paulmck@...nel.org, pawan.kumar.gupta@...ux.intel.com,
 peterz@...radead.org, rick.p.edgecombe@...el.com, rppt@...nel.org,
 sandipan.das@....com, shijie@...amperecomputing.com, sohil.mehta@...el.com,
 tglx@...utronix.de, tj@...nel.org, tony.luck@...el.com,
 vegard.nossum@...cle.com, x86@...nel.org, xin3.li@...el.com,
 xiongwei.song@...driver.com, ytcoode@...il.com
Subject: Re: [PATCHv6 07/16] x86/vsyscall: Reorganize the #PF emulation code

On 23/06/2025 1:41 pm, Kirill A. Shutemov wrote:
> On Fri, Jun 20, 2025 at 04:21:38PM -0700, Dave Hansen wrote:
>> On 6/20/25 16:08, Andrew Cooper wrote:
>>>> But, the resulting code is wonky. It needs to do something more like this:
>>>>
>>>> 	if ((error_code & (X86_PF_WRITE | X86_PF_USER)) != X86_PF_USER)
>>>> 		return false;
>>>>
>>>> 	if (error_code & X86_PF_INSTR))
>>>> 		return __emulate_vsyscall(regs, address);
>>> To do this, LASS needs a proper interlink against NX || SMEP.
>>>
>>> If neither NX nor SMEP are active, the CPU does not report X86_PF_INSTR,
>>> meaning that fetches are reported as plain reads.
>> Interesting point.
>>
>> I think the easiest way to do this is just make a cpuid_deps[] entry for
>> LASS and NX. If there's a CPU where LASS is available but where NX isn't
>> available, we have much bigger problems on our hands.
> I am not sure what I suppose to do here.
>
> Sohil pointed out that with LASS we get #GP on vsyscall, not #PF and PFEC
> is not relevant for LASS.

Correct.  That was my mistake originally.

>
> So, IIUC, that's dependency of vsyscall PF on NX. Do we want to disable
> vsyscall on boot if NX is not available?
>
> BTW, why do we even support !NX on X86_64? Is there such HW?

Yes.  Early P4 steppings had no NX at all.

~Andrew