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Message-ID: <20250623144547.xuitjtmfq6mswmxk@bryanbrattlof.com>
Date: Mon, 23 Jun 2025 09:45:47 -0500
From: Bryan Brattlof <bb@...com>
To: Paresh Bhagat <p-bhagat@...com>
CC: <nm@...com>, <vigneshr@...com>, <praneeth@...com>, <kristo@...nel.org>,
        <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <khasim@...com>, <v-singh1@...com>,
        <afd@...com>, <devarsht@...com>
Subject: Re: [PATCHv4 1/6] arm64: dts: ti: Add bootph property to nodes at
 source for am62a

On June 23, 2025 thus sayeth Paresh Bhagat:
> Add bootph property directly into the original definitions of relevant
> nodes (e.g., power domains, USB controllers, and other peripherals)
> within their respective DTSI files (ex. main, mcu, and wakeup)i for
> am62a.
> 
> By defining bootph in the nodes source definitions instead of appending
> it later in final DTS files, this change ensures that the property is
> inherently present wherever the nodes are reused across derived device
> trees.
> 
> Signed-off-by: Paresh Bhagat <p-bhagat@...com>
> ---
>  arch/arm64/boot/dts/ti/k3-am62a-main.dtsi   | 15 +++++++++++++++
>  arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi    |  1 +
>  arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi |  3 +++
>  arch/arm64/boot/dts/ti/k3-am62a.dtsi        |  3 +++
>  4 files changed, 22 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
> index 63e097ddf988..1b7fe4487475 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
> @@ -51,6 +51,7 @@ phy_gmii_sel: phy@...4 {
>  			compatible = "ti,am654-phy-gmii-sel";
>  			reg = <0x4044 0x8>;
>  			#phy-cells = <1>;
> +			bootph-all;
>  		};
>  
>  		epwm_tbclk: clock-controller@...0 {
> @@ -84,6 +85,7 @@ dmss: bus@...00000 {
>  		#size-cells = <2>;
>  		dma-ranges;
>  		ranges = <0x00 0x48000000 0x00 0x48000000 0x00 0x06000000>;
> +		bootph-all;
>  
>  		ti,sci-dev-id = <25>;
>  
> @@ -96,6 +98,7 @@ secure_proxy_main: mailbox@...00000 {
>  			#mbox-cells = <1>;
>  			interrupt-names = "rx_012";
>  			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> +			bootph-all;
>  		};
>  
>  		inta_main_dmss: interrupt-controller@...00000 {
> @@ -131,6 +134,7 @@ main_bcdma: dma-controller@...c0100 {
>  			ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
>  			ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
>  			ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
> +			bootph-all;
>  		};
>  
>  		main_pktdma: dma-controller@...c0000 {
> @@ -167,6 +171,7 @@ main_pktdma: dma-controller@...c0000 {
>  						<0x2c>, /* FLOW_CPSW_RX_CHAN */
>  						<0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
>  						<0x32>; /* FLOW_SAUL_RX_2/3_CHAN */
> +			bootph-all;
>  		};
>  	};
>  
> @@ -216,20 +221,24 @@ dmsc: system-controller@...43000 {
>  		mbox-names = "rx", "tx";
>  		mboxes = <&secure_proxy_main 12>,
>  			 <&secure_proxy_main 13>;
> +		bootph-all;
>  
>  		k3_pds: power-controller {
>  			compatible = "ti,sci-pm-domain";
>  			#power-domain-cells = <2>;
> +			bootph-all;
>  		};
>  
>  		k3_clks: clock-controller {
>  			compatible = "ti,k2g-sci-clk";
>  			#clock-cells = <2>;
> +			bootph-all;
>  		};
>  
>  		k3_reset: reset-controller {
>  			compatible = "ti,sci-reset";
>  			#reset-cells = <2>;
> +			bootph-all;
>  		};
>  	};
>  
> @@ -254,6 +263,7 @@ secure_proxy_sa3: mailbox@...00000 {
>  		 * firmware on non-MPU processors
>  		 */
>  		status = "disabled";
> +		bootph-all;
>  	};
>  
>  	main_pmx0: pinctrl@...00 {
> @@ -262,6 +272,7 @@ main_pmx0: pinctrl@...00 {
>  		#pinctrl-cells = <1>;
>  		pinctrl-single,register-width = <32>;
>  		pinctrl-single,function-mask = <0xffffffff>;
> +		bootph-all;
>  	};
>  
>  	main_esm: esm@...000 {
> @@ -282,6 +293,7 @@ main_timer0: timer@...0000 {
>  		assigned-clock-parents = <&k3_clks 36 3>;
>  		power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
>  		ti,timer-pwm;
> +		bootph-all;
>  	};
>  
>  	main_timer1: timer@...0000 {
> @@ -653,6 +665,7 @@ usb0: usb@...00000 {
>  			dr_mode = "otg";
>  			snps,usb2-gadget-lpm-disable;
>  			snps,usb2-lpm-disable;
> +			bootph-all;
>  		};
>  	};
>  
> @@ -745,6 +758,7 @@ cpsw_port1: port@1 {
>  				phys = <&phy_gmii_sel 1>;
>  				mac-address = [00 00 00 00 00 00];
>  				ti,syscon-efuse = <&cpsw_mac_syscon 0x0>;
> +				bootph-all;
>  			};
>  
>  			cpsw_port2: port@2 {
> @@ -764,6 +778,7 @@ cpsw3g_mdio: mdio@f00 {
>  			clocks = <&k3_clks 13 0>;
>  			clock-names = "fck";
>  			bus_freq = <1000000>;
> +			bootph-all;
>  		};
>  
>  		cpts@...00 {
> diff --git a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
> index ee961ced7208..df4aa131097f 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
> @@ -12,6 +12,7 @@ mcu_pmx0: pinctrl@...4000 {
>  		#pinctrl-cells = <1>;
>  		pinctrl-single,register-width = <32>;
>  		pinctrl-single,function-mask = <0xffffffff>;
> +		bootph-all;
>  	};
>  
>  	mcu_esm: esm@...0000 {
> diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
> index 259ae6ebbfb5..86aae252385c 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
> @@ -13,10 +13,12 @@ wkup_conf: bus@...00000 {
>  		#address-cells = <1>;
>  		#size-cells = <1>;
>  		ranges = <0x00 0x00 0x43000000 0x20000>;
> +		bootph-all;
>  
>  		chipid: chipid@14 {
>  			compatible = "ti,am654-chipid";
>  			reg = <0x14 0x4>;
> +			bootph-all;
>  		};
>  
>  		opp_efuse_table: syscon@18 {
> @@ -67,6 +69,7 @@ wkup_uart0: serial@0 {
>  			reg = <0 0x100>;
>  			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
>  			status = "disabled";
> +			bootph-pre-ram;
>  	       };
>  	};
>  
> diff --git a/arch/arm64/boot/dts/ti/k3-am62a.dtsi b/arch/arm64/boot/dts/ti/k3-am62a.dtsi
> index 4d79b3e9486a..54eab2c93eff 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62a.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62a.dtsi
> @@ -50,6 +50,7 @@ cbass_main: bus@...00 {
>  		compatible = "simple-bus";
>  		#address-cells = <2>;
>  		#size-cells = <2>;
> +		bootph-all;

We only need to add the bootph-* properties to the leaf nodes. U-Boot is 
smart enough to propagate these properties all the way to the root when 
it's pruning the device tree for the bootloaders.

~Bryan

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