linux-kernel - Re: [PATCH V8 0/3] riscv: mm: Add soft-dirty and uffd-wp support

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Message-ID: <mhng-536B594B-996C-4A15-8744-C7A27B45720E@palmerdabbelt-mac>
Date: Mon, 23 Jun 2025 16:03:17 -0700 (PDT)
From: Palmer Dabbelt <palmer@...belt.com>
To: zhangchunyan@...as.ac.cn
CC: Paul Walmsley <paul.walmsley@...ive.com>, aou@...s.berkeley.edu,
  Alexandre Ghiti <alex@...ti.fr>, akpm@...ux-foundation.org, linux-riscv@...ts.infradead.org, debug@...osinc.com,
  Vedvyas Shanbhogue <ved@...osinc.com>, linux-kernel@...r.kernel.org, zhang.lyra@...il.com
Subject:     Re: [PATCH V8 0/3] riscv: mm: Add soft-dirty and uffd-wp support

On Wed, 18 Jun 2025 23:52:29 PDT (-0700), zhangchunyan@...as.ac.cn wrote:
> This patchset adds Svrsw60t59b [1] extension support, also soft dirty and userfaultfd
> write protect tracking for RISC-V.
>
> This patchset has been tested with kselftest mm suite in which soft-dirty,
> madv_populate, test_unmerge_uffd_wp, and uffd-unit-tests run and pass,
> and no regressions are observed in any of the other tests.
>
> This patchset applies on top of v6.16-rc1.
>
> V8:
> - Rebase on v6.16-rc1;
> - Add dependencies to MMU && 64BIT for RISCV_ISA_SVRSW60T59B;
> - Use 'Svrsw60t59b' instead of 'SVRSW60T59B' in Kconfig help paragraph;
> - Add Alex's Reviewed-by tag in patch 1.
>
> V7: (https://lore.kernel.org/all/20250409095320.224100-1-zhangchunyan@iscas.ac.cn/)
> - Add Svrsw60t59b [1] extension support;
> - Have soft-dirty and uffd-wp depending on the Svrsw60t59b extension to
>   avoid crashes for the hardware which don't have this extension.
>
> V6:
> - Changes to use bits 59-60 which are supported by extension Svrsw60t59b
>   for soft dirty and userfaultfd write protect tracking.
>
> V5:
> - Fixed typos and corrected some words in Kconfig and commit message;
> - Removed pte_wrprotect() from pte_swp_mkuffd_wp(), this is a copy-paste
>   error;
> - Added Alex's Reviewed-by tag in patch 2.
>
> V4:
> - Added bit(4) descriptions into "Format of swap PTE".
>
> V3:
> - Fixed the issue reported by kernel test irobot <lkp@...el.com>.
>
> V1 -> V2:
> - Add uffd-wp supported;
> - Make soft-dirty uffd-wp and devmap mutually exclusive which all use
>   the same PTE bit;
> - Add test results of CRIU in the cover-letter.
>
> [1] https://github.com/riscv/Svrsw60t59b.git

This 404s (with or without the ".git" suffix).  I remember seeing the 
spec at some point, but I can't find it anywhwere else.

>
> Chunyan Zhang (3):
>   riscv: Add RISC-V Svrsw60t59b extension support
>   riscv: mm: Add soft-dirty page tracking support
>   riscv: mm: Add uffd write-protect support
>
>  arch/riscv/Kconfig                    |  16 +++
>  arch/riscv/include/asm/hwcap.h        |   1 +
>  arch/riscv/include/asm/pgtable-bits.h |  37 +++++++
>  arch/riscv/include/asm/pgtable.h      | 136 +++++++++++++++++++++++++-
>  arch/riscv/kernel/cpufeature.c        |   1 +
>  5 files changed, 189 insertions(+), 2 deletions(-)