linux-kernel - [PATCH v2 2/5] ARM: dts: qcom: msm8960: add gsbi8 and its serial configuration

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Message-Id: <20250623-msm8960-sdcard-v2-2-340a5e8f7df0@smankusors.com>
Date: Sun, 22 Jun 2025 18:26:41 +0000 (UTC)
From: Antony Kurniawan Soemardi <linux@...nkusors.com>
To: Bjorn Andersson <andersson@...nel.org>, 
 Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, 
 Antony Kurniawan Soemardi <linux@...nkusors.com>, 
 Max Shevchenko <wctrl@...ton.me>, Rudraksha Gupta <guptarud@...il.com>
Subject: [PATCH v2 2/5] ARM: dts: qcom: msm8960: add gsbi8 and its serial
 configuration

The LTE variant of the MSM8960 SoC has a gsbi8 node used for the
serial console.

That's if the downstream kernel is to be believed, as Xperia SP has
a serial console on gsbi8 even on the non-LTE variant.

Signed-off-by: Antony Kurniawan Soemardi <linux@...nkusors.com>
---
 arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
index 4babd0bbe5d638b228e05cdfe6b068b4ea16335f..588ac6c7a51a667202550432bee14fa14f3f74e7 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
@@ -333,6 +333,34 @@ gsbi5_serial: serial@...40000 {
 			};
 		};
 
+		gsbi8: gsbi@...00000  {
+			compatible = "qcom,gsbi-v1.0.0";
+			cell-index = <8>;
+			reg = <0x1a000000 0x100>;
+			clocks = <&gcc GSBI8_H_CLK>;
+			clock-names = "iface";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			syscon-tcsr = <&tcsr>;
+
+			status = "disabled";
+
+			gsbi8_serial: serial@...40000 {
+				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+				reg = <0x1a040000 0x1000>,
+				      <0x1a000000 0x1000>;
+				interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&gcc GSBI8_UART_CLK>,
+					 <&gcc GSBI8_H_CLK>;
+				clock-names = "core",
+					      "iface";
+
+				status = "disabled";
+			};
+		};
+
 		ssbi: ssbi@...000 {
 			compatible = "qcom,ssbi";
 			reg = <0x500000 0x1000>;

-- 
2.34.1