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Message-ID: <0bc7542e-e7e2-4ee1-ad90-45fdac2b613a@linux.intel.com>
Date: Mon, 23 Jun 2025 09:39:48 +0800
From: "Mi, Dapeng" <dapeng1.mi@...ux.intel.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Ingo Molnar <mingo@...hat.com>, Arnaldo Carvalho de Melo
<acme@...nel.org>, Namhyung Kim <namhyung@...nel.org>,
Ian Rogers <irogers@...gle.com>, Adrian Hunter <adrian.hunter@...el.com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Kan Liang <kan.liang@...ux.intel.com>, Andi Kleen <ak@...ux.intel.com>,
Eranian Stephane <eranian@...gle.com>, linux-kernel@...r.kernel.org,
linux-perf-users@...r.kernel.org, Dapeng Mi <dapeng1.mi@...el.com>
Subject: Re: [Patch v4 09/13] perf/x86/intel: Setup PEBS data configuration
and enable legacy groups
On 6/21/2025 5:36 PM, Peter Zijlstra wrote:
> On Fri, Jun 20, 2025 at 10:39:05AM +0000, Dapeng Mi wrote:
>> +static inline void __intel_update_large_pebs_flags(struct pmu *pmu)
>> +{
>> + u64 caps = hybrid(pmu, arch_pebs_cap).caps;
>> +
>> + x86_pmu.large_pebs_flags |= PERF_SAMPLE_TIME;
>> + if (caps & ARCH_PEBS_LBR)
>> + x86_pmu.large_pebs_flags |= PERF_SAMPLE_BRANCH_STACK;
>> +
>> + if (!(caps & ARCH_PEBS_AUX))
>> + x86_pmu.large_pebs_flags &= ~PERF_SAMPLE_DATA_SRC;
>> + if (!(caps & ARCH_PEBS_GPR))
>> + x86_pmu.large_pebs_flags &=
>> + ~(PERF_SAMPLE_REGS_INTR | PERF_SAMPLE_REGS_USER);
> Coding style wants { } on this, because multi-line.
Sure. Thanks.
>
>> +}
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