| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20250623-ddrperfm-upstream-v1-7-7dffff168090@foss.st.com>
Date: Mon, 23 Jun 2025 11:27:12 +0200
From: Clément Le Goffic <clement.legoffic@...s.st.com>
To: Will Deacon <will@...nel.org>, Mark Rutland <mark.rutland@....com>,
Rob
Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor
Dooley <conor+dt@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Philipp Zabel
<p.zabel@...gutronix.de>,
Jonathan Corbet <corbet@....net>,
Gatien Chevallier
<gatien.chevallier@...s.st.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Gabriel Fernandez
<gabriel.fernandez@...s.st.com>
CC: <linux-arm-kernel@...ts.infradead.org>, <linux-perf-users@...r.kernel.org>,
<devicetree@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
<linux-kernel@...r.kernel.org>, <linux-doc@...r.kernel.org>,
<linux-clk@...r.kernel.org>,
Clément Le Goffic <clement.legoffic@...s.st.com>
Subject: [PATCH 07/13] Documentation: perf: stm32: add ddrperfm support
The DDRPERFM is the DDR Performance Monitor embedded in STM32MPU SoC.
This documentation introduces the DDRPERFM, the stm32-ddr-pmu driver
supporting it and how to use it with the perf tool.
Signed-off-by: Clément Le Goffic <clement.legoffic@...s.st.com>
---
Documentation/admin-guide/perf/index.rst | 1 +
Documentation/admin-guide/perf/stm32-ddr-pmu.rst | 86 ++++++++++++++++++++++++
2 files changed, 87 insertions(+)
diff --git a/Documentation/admin-guide/perf/index.rst b/Documentation/admin-guide/perf/index.rst
index 072b510385c4..33aedc4ee5c3 100644
--- a/Documentation/admin-guide/perf/index.rst
+++ b/Documentation/admin-guide/perf/index.rst
@@ -29,3 +29,4 @@ Performance monitor support
cxl
ampere_cspmu
mrvl-pem-pmu
+ stm32-ddr-pmu
diff --git a/Documentation/admin-guide/perf/stm32-ddr-pmu.rst b/Documentation/admin-guide/perf/stm32-ddr-pmu.rst
new file mode 100644
index 000000000000..5b02bf44dd7a
--- /dev/null
+++ b/Documentation/admin-guide/perf/stm32-ddr-pmu.rst
@@ -0,0 +1,86 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+========================================
+STM32 DDR Performance Monitor (DDRPERFM)
+========================================
+
+The DDRPERFM is the DDR Performance Monitor embedded in STM32MPU SoC.
+The DDR controller provides events to DDRPERFM, once selected they are counted in the DDRPERFM
+peripheral.
+
+In MP1 family, the DDRPERFM is able to count 4 different events at the same time.
+However, the 4 events must belong to the same set.
+One hardware counter is dedicated to the time counter, `time_cnt`.
+
+In MP2 family, the DDRPERFM is able to select between 44 different DDR events.
+As for MP1, there is a dedicated hardware counter for the time.
+It is incremented every 4 DDR clock cycles.
+All the other counters can be freely allocated to count any other DDR event.
+
+The stm32-ddr-pmu driver relies on the perf PMU framework to expose the counters via sysfs:
+
+On MP1:
+
+ .. code-block:: bash
+
+ $ ls /sys/bus/event_source/devices/stm32_ddr_pmu/events/
+ cactive_ddrc perf_lpr_req_with_no_credit perf_op_is_wr
+ ctl_idle perf_lpr_xact_when_critical perf_selfresh_mode
+ dfi_lp_req perf_op_is_activate perf_wr_xact_when_critical
+ dfi_lp_req_cpy perf_op_is_enter_powerdown time_cnt
+ perf_hpr_req_with_no_credit perf_op_is_rd
+ perf_hpr_xact_when_critical perf_op_is_refresh
+
+On MP2:
+
+ .. code-block:: bash
+
+ $ ls /sys/bus/event_source/devices/stm32_ddr_pmu/events/
+ dfi_is_act perf_hpr_req_with_nocredit perf_op_is_spec_ref
+ dfi_is_mpc perf_hpr_xact_when_critical perf_op_is_wr
+ dfi_is_mrr perf_lpr_req_with_nocredit perf_op_is_zqcal
+ dfi_is_mrw perf_lpr_xact_when_critical perf_rank
+ dfi_is_mwr perf_op_is_act perf_raw_hazard
+ dfi_is_mwra perf_op_is_crit_ref perf_rdwr_transitions
+ dfi_is_preab perf_op_is_enter_powdn perf_read_bypass
+ dfi_is_prepb perf_op_is_enter_selfref perf_war_hazard
+ dfi_is_rd perf_op_is_mwr perf_waw_hazard
+ dfi_is_rda perf_op_is_pre perf_window_limit_reached_rd
+ dfi_is_refab perf_op_is_pre_for_others perf_window_limit_reached_wr
+ dfi_is_refpb perf_op_is_pre_for_rdwr perf_wr_xact_when_critical
+ dfi_is_wr perf_op_is_rd time_cnt
+ dfi_is_wra perf_op_is_rd_activate
+ perf_act_bypass perf_op_is_ref
+
+
+The perf PMU framework is usually invoked via the 'perf stat' tool.
+
+
+Example:
+
+ .. code-block:: bash
+
+ $ perf stat --timeout 60000 -e stm32_ddr_pmu/dfi_is_act/,\
+ > stm32_ddr_pmu/dfi_is_rd/,\
+ > stm32_ddr_pmu/dfi_is_wr/,\
+ > stm32_ddr_pmu/dfi_is_refab/,\
+ > stm32_ddr_pmu/dfi_is_mrw/,\
+ > stm32_ddr_pmu/dfi_is_rda/,\
+ > stm32_ddr_pmu/dfi_is_wra/,\
+ > stm32_ddr_pmu/dfi_is_mrr/,\
+ > stm32_ddr_pmu/time_cnt/ \
+ > -a sleep 5
+
+ Performance counter stats for 'system wide':
+
+ 481025 stm32_ddr_pmu/dfi_is_act/
+ 732166 stm32_ddr_pmu/dfi_is_rd/
+ 144926 stm32_ddr_pmu/dfi_is_wr/
+ 644154 stm32_ddr_pmu/dfi_is_refab/
+ 0 stm32_ddr_pmu/dfi_is_mrw/
+ 0 stm32_ddr_pmu/dfi_is_rda/
+ 0 stm32_ddr_pmu/dfi_is_wra/
+ 0 stm32_ddr_pmu/dfi_is_mrr/
+ 752347686 stm32_ddr_pmu/time_cnt/
+
+ 5.014910750 seconds time elapsed
--
2.43.0
Powered by blists - more mailing lists