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Message-ID: <kZ6sH6-8EHhW5FtsAmo9HXndj7D1jFyW0cv0A4KDO3i5SS9JiGEZNTd1gbMXizu4vI0M0hjROLK5DEnKbB36jWUKUPRKukq5IRK9Tz2qz7k=@proton.me>
Date: Mon, 23 Jun 2025 09:49:59 +0000
From: Max Shevchenko <wctrl@...ton.me>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Cc: "conor+dt@...nel.org" <conor+dt@...nel.org>, "daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>, "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>, "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>, "jirislaby@...nel.org" <jirislaby@...nel.org>, "krzk+dt@...nel.org" <krzk+dt@...nel.org>, "linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>, "linux-serial@...r.kernel.org" <linux-serial@...r.kernel.org>, "linux-watchdog@...r.kernel.org" <linux-watchdog@...r.kernel.org>, "linux@...linux.org.uk" <linux@...linux.org.uk>, "linux@...ck-us.net" <linux@...ck-us.net>, "matthias.bgg@...il.com" <matthias.bgg@...il.com>, "robh@...nel.org" <robh@...nel.org>, "sean.wang@...iatek.com" <sean.wang@...iatek.com>, "tglx@...utronix.de" <tglx@...utronix.de>, "wctrl@...ton.me" <wctrl@...ton.me>, "wim@...ux-watchdog.org"
<wim@...ux-watchdog.org>
Subject: Re: [PATCH 09/11] ARM: dts: mediatek: add basic support for MT6572 SoC
On Monday, June 23rd, 2025 at 11:35 AM, AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com> wrote:
> Il 20/06/25 17:40, Max Shevchenko via B4 Relay ha scritto:
>
> > From: Max Shevchenko wctrl@...ton.me
> >
> > Add basic support for the MediaTek MT6572 SoC.
> >
> > Signed-off-by: Max Shevchenko wctrl@...ton.me
> > ---
> > arch/arm/boot/dts/mediatek/mt6572.dtsi | 105 +++++++++++++++++++++++++++++++++
> > 1 file changed, 105 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/mediatek/mt6572.dtsi b/arch/arm/boot/dts/mediatek/mt6572.dtsi
> > new file mode 100644
> > index 0000000000000000000000000000000000000000..dd12231ca745be7455e99391abd2d708f2f1a8a9
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/mediatek/mt6572.dtsi
> > @@ -0,0 +1,105 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (c) 2025 Max Shevchenko wctrl@...ton.me
> > + */
> > +
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +/ {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "mediatek,mt6572";
> > + interrupt-parent = <&sysirq>;
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + enable-method = "mediatek,mt6589-smp";
> > +
> > + cpu@0 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a7";
> > + reg = <0x0>;
> > + };
> > + cpu@1 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a7";
> > + reg = <0x1>;
> > + };
> > + };
> > +
> > + system_clk: dummy13m {
> > + compatible = "fixed-clock";
> > + clock-frequency = <13000000>;
> > + #clock-cells = <0>;
> > + };
> > +
> > + rtc_clk: dummy32k {
> > + compatible = "fixed-clock";
> > + clock-frequency = <32000>;
> > + #clock-cells = <0>;
> > + };
> > +
> > + uart_clk: dummy26m {
> > + compatible = "fixed-clock";
> > + clock-frequency = <26000000>;
> > + #clock-cells = <0>;
> > + };
> > +
>
>
> Anything that has an MMIO address shall be child of "soc".
>
> soc {
> watchdog@....
>
> timer@....
>
> etc.
> };
>
> > + watchdog: watchdog@...07000 {
> > + compatible = "mediatek,mt6572-wdt",
> > + "mediatek,mt6589-wdt";
>
>
> those fit in one line:
>
> compatible = "mediatek,mt6572-wdt", "mediatek,mt6589-wdt";
>
> > + reg = <0x10007000 0x100>;
> > + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_LOW>;
> > + timeout-sec = <15>;
> > + #reset-cells = <1>;
> > + };
> > +
> > + timer: timer@...08000 {
> > + compatible = "mediatek,mt6572-timer",
> > + "mediatek,mt6577-timer";
>
>
> same
>
> > + reg = <0x10008000 0x80>;
> > + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&system_clk>, <&rtc_clk>;
> > + clock-names = "system-clk", "rtc-clk";
> > + };
> > +
> > + sysirq: interrupt-controller@...00100 {
> > + compatible = "mediatek,mt6572-sysirq",
> > + "mediatek,mt6577-sysirq";
>
>
> same; and reg goes after compatible.
>
> > + interrupt-controller;
> > + #interrupt-cells = <3>;
> > + interrupt-parent = <&gic>;
>
>
> are you sure that interrupt-parent is gic?
Other MT65xx devicetrees have GIC as parent for itself and SYSIRQ, so I assume.
>
> > + reg = <0x10200100 0x1c>;
> > + };
> > +
> > + gic: interrupt-controller@...11000 {
> > + compatible = "arm,cortex-a7-gic";
>
>
> reg here.
>
> > + interrupt-controller;
> > + #interrupt-cells = <3>;
> > + interrupt-parent = <&gic>;
>
>
> are you sure that the interrupt parent isn't sysirq here? :-)
not really, downstream has no mentions about SYSIRQ or its' address
>
> > + reg = <0x10211000 0x1000>,
> > + <0x10212000 0x2000>,
> > + <0x10214000 0x2000>,
> > + <0x10216000 0x2000>;
> > + };
> > +
> > + uart0: serial@...05000 {
> > + compatible = "mediatek,mt6572-uart",
> > + "mediatek,mt6577-uart";
>
>
> fits in one line
>
> > + reg = <0x11005000 0x400>;
> > + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&uart_clk>;
>
>
> clock-names = .....
>
> > + status = "disabled";
> > + };
> > +
> > + uart1: serial@...06000 {
> > + compatible = "mediatek,mt6572-uart",
>
>
> ...again.
>
> > + "mediatek,mt6577-uart";
> > + reg = <0x11006000 0x400>;
> > + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&uart_clk>;
> > + status = "disabled";
> > + };
> > +};
>
>
> Cheers,
> Angelo
thanks for suggestions, applied.
Sincerely,
Max
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