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Message-ID: <46b968a38e722af2fbe6f2f4219add67323f05b9.1750182562.git.Ryan.Wanner@microchip.com>
Date: Tue, 24 Jun 2025 08:08:09 -0700
From: <Ryan.Wanner@...rochip.com>
To: <mturquette@...libre.com>, <sboyd@...nel.org>,
<nicolas.ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
<claudiu.beznea@...on.dev>
CC: <robh@...nel.org>, <linux-clk@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<varshini.rajendran@...rochip.com>
Subject: [PATCH v2 12/32] clk: at91: clk-pll: add support for parent_hw
From: Claudiu Beznea <claudiu.beznea@...on.dev>
Add support for parent_hw in pll clock driver. With this parent-child
relation is described with pointers rather than strings making
registration a bit faster.
All the SoC based drivers that rely on clk-pll were adapted
to the new API change. The switch itself for SoCs will be done
in subsequent patches.
Signed-off-by: Claudiu Beznea <claudiu.beznea@...on.dev>
[ryan.wanner@...rochip.com: Remove SoC specific changes as they are
going to be coalesced into one SoC specific commit.]
Signed-off-by: Ryan Wanner <Ryan.Wanner@...rochip.com>
---
drivers/clk/at91/clk-pll.c | 9 ++++++---
drivers/clk/at91/dt-compat.c | 2 +-
drivers/clk/at91/pmc.h | 2 +-
3 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c
index 249d6a53cedf..f973c3b1bbec 100644
--- a/drivers/clk/at91/clk-pll.c
+++ b/drivers/clk/at91/clk-pll.c
@@ -310,13 +310,13 @@ static const struct clk_ops pll_ops = {
struct clk_hw * __init
at91_clk_register_pll(struct regmap *regmap, const char *name,
- const char *parent_name, u8 id,
+ const char *parent_name, struct clk_parent_data *parent_data, u8 id,
const struct clk_pll_layout *layout,
const struct clk_pll_characteristics *characteristics)
{
struct clk_pll *pll;
struct clk_hw *hw;
- struct clk_init_data init;
+ struct clk_init_data init = {};
int offset = PLL_REG(id);
unsigned int pllr;
int ret;
@@ -330,7 +330,10 @@ at91_clk_register_pll(struct regmap *regmap, const char *name,
init.name = name;
init.ops = &pll_ops;
- init.parent_names = &parent_name;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
+ else
+ init.parent_names = &parent_name;
init.num_parents = 1;
init.flags = CLK_SET_RATE_GATE;
diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c
index 7883198f6a98..2c5faa3b1cfd 100644
--- a/drivers/clk/at91/dt-compat.c
+++ b/drivers/clk/at91/dt-compat.c
@@ -665,7 +665,7 @@ of_at91_clk_pll_setup(struct device_node *np,
if (!characteristics)
return;
- hw = at91_clk_register_pll(regmap, name, parent_name, id, layout,
+ hw = at91_clk_register_pll(regmap, name, parent_name, NULL, id, layout,
characteristics);
if (IS_ERR(hw))
goto out_free_characteristics;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 87ab1211576f..0feaf8497b60 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -238,7 +238,7 @@ at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
struct clk_hw * __init
at91_clk_register_pll(struct regmap *regmap, const char *name,
- const char *parent_name, u8 id,
+ const char *parent_name, struct clk_parent_data *parent_data, u8 id,
const struct clk_pll_layout *layout,
const struct clk_pll_characteristics *characteristics);
struct clk_hw * __init
--
2.43.0
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