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Message-ID: <175079322774.520923.14554474229751214016.b4-ty@google.com>
Date: Tue, 24 Jun 2025 12:38:36 -0700
From: Sean Christopherson <seanjc@...gle.com>
To: Sean Christopherson <seanjc@...gle.com>, Paolo Bonzini <pbonzini@...hat.com>
Cc: kvm@...r.kernel.org, linux-kernel@...r.kernel.org,
Jon Kohler <jon@...anix.com>, Sergey Dyasli <sergey.dyasli@...anix.com>
Subject: Re: [PATCH] KVM: x86/mmu: Exempt nested EPT page tables from !USER,
CR0.WP=0 logic
On Mon, 02 Jun 2025 16:48:51 -0700, Sean Christopherson wrote:
> Exempt nested EPT shadow pages tables from the CR0.WP=0 handling of
> supervisor writes, as EPT doesn't have a U/S bit and isn't affected by
> CR0.WP (or CR4.SMEP in the exception to the exception).
>
> Opportunistically refresh the comment to explain what KVM is doing, as
> the only record of why KVM shoves in WRITE and drops USER is buried in
> years-old changelogs.
>
> [...]
Applied to kvm-x86 mmu, thanks!
[1/1] KVM: x86/mmu: Exempt nested EPT page tables from !USER, CR0.WP=0 logic
https://github.com/kvm-x86/linux/commit/ffced8922050
--
https://github.com/kvm-x86/kvm-unit-tests/tree/next
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