linux-kernel - Re: [PATCH v4 0/2] PCI: Fix the issue of failed speed limit lifting

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <alpine.DEB.2.21.2506242302510.61655@angie.orcam.me.uk>
Date: Tue, 24 Jun 2025 23:07:28 +0100 (BST)
From: "Maciej W. Rozycki" <macro@...am.me.uk>
To: Bjorn Helgaas <helgaas@...nel.org>
cc: Jiwei Sun <sjiwei@....com>, 
    Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>, 
    Bjorn Helgaas <bhelgaas@...gle.com>, linux-pci@...r.kernel.org, 
    linux-kernel@...r.kernel.org, Lukas Wunner <lukas@...ner.de>, 
    ahuang12@...ovo.com, sunjw10@...ovo.com, jiwei.sun.bj@...com, 
    sunjw10@...look.com, Andrew <andreasx0@...tonmail.com>, 
    Matthew W Carlis <mattc@...estorage.com>, 
    Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@...ux.intel.com>
Subject: Re: [PATCH v4 0/2] PCI: Fix the issue of failed speed limit
 lifting

On Tue, 24 Jun 2025, Bjorn Helgaas wrote:

> > Jiwei Sun (2):
> >   PCI: Fix the wrong reading of register fields
> >   PCI: Adjust the position of reading the Link Control 2 register
> > 
> >  drivers/pci/pci.h    | 32 +++++++++++++++++++-------------
> >  drivers/pci/quirks.c |  6 ++++--
> >  2 files changed, 23 insertions(+), 15 deletions(-)
> 
> Sorry, this totally slipped through the cracks.  I applied both of
> these to pci/enumeration for v6.17.
> 
> Andrew reported tripping over this issue fixed by the first patch, and
> Lukas also posted a similar patch [1] to fix it, so I updated the
> commit log as below to include details of Andrew's report.
> 
> As Lukas did, I added a stable tag but made it for v6.13+ (not v6.12+)
> because I think the actual problem showed up with de9a6c8d5dbf
> ("PCI/bwctrl: Add pcie_set_target_speed() to set PCIe Link Speed"),
> not with f68dea13405c ("PCI: Revert to the original speed after PCIe
> failed link retraining").

 Thank you for taking care of these issues while I've been distracted with 
no resources available to actually try things in my lab.

  Maciej