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Message-ID: <0f495eec39fd25d71a59a56876f6142e6fe786f3.camel@codeconstruct.com.au>
Date: Wed, 25 Jun 2025 09:14:05 +0930
From: Andrew Jeffery <andrew@...econstruct.com.au>
To: Leo Wang <leo.jt.wang@...il.com>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Joel Stanley <joel@....id.au>, Kees Cook
 <kees@...nel.org>, Tony Luck <tony.luck@...el.com>,  "Guilherme G. Piccoli"
 <gpiccoli@...lia.com>, Geert Uytterhoeven <geert+renesas@...der.be>, Magnus
 Damm <magnus.damm@...il.com>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
	linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org, 
	linux-hardening@...r.kernel.org, linux-renesas-soc@...r.kernel.org, 
	bruce.jy.hung@...-foxconn.com, george.kw.lee@...-foxconn.com, Leo Wang
	 <leo.jt.wang@...-foxconn.com>
Subject: Re: [PATCH v2 2/2] ARM: dts: aspeed: clemente: add Meta Clemente BMC

On Sat, 2025-06-21 at 15:51 +0800, Leo Wang wrote:
> From: Leo Wang <leo.jt.wang@...il.com>
> 
> Add linux device tree entry for Meta Clemente compute-tray
> BMC using AST2600 SoC.
> 
> Signed-off-by: Leo Wang <leo.jt.wang@...-foxconn.com>
> ---
>  arch/arm/boot/dts/aspeed/Makefile                  |    1 +
>  .../dts/aspeed/aspeed-bmc-facebook-clemente.dts    | 1254 ++++++++++++++++++++
>  2 files changed, 1255 insertions(+)
> 
> 

*snip*

> +
> +&i2c2 {
> +       status = "okay";
> +       // Module 0, Expander @0x20
> +       io_expander0: gpio@20 {
> +               compatible = "nxp,pca9555";
> +               reg = <0x20>;
> +               gpio-controller;
> +               #gpio-cells = <2>;
> +       };
> +

*snip*

> +
> +&io_expander0 {
> +       gpio-line-names =
> +               "FPGA_THERM_OVERT_L-I",
> +               "FPGA_READY_BMC-I",
> +               "HMC_BMC_DETECT-O",
> +               "HMC_PGOOD-O",
> +               "",
> +               "BMC_STBY_CYCLE-O",
> +               "FPGA_EROT_FATAL_ERROR_L-I",
> +               "WP_HW_EXT_CTRL_L-O",
> +               "EROT_FPGA_RST_L-O",
> +               "FPGA_EROT_RECOVERY_L-O",
> +               "BMC_EROT_FPGA_SPI_MUX_SEL-O",
> +               "USB2_HUB_RST_L-O",
> +               "",
> +               "SGPIO_EN_L-O",
> +               "B2B_IOEXP_INT_L-I",
> +               "I2C_BUS_MUX_RESET_L-O";
> +};

io_expander0 is a node label that you're defining in this same source
file. The coding style expectation is that you define all the
properties in the node itself. Label references like the one above
should be used when referencing nodes from included files.

Please fix throughout (e.g. at least io_expander1 - io_expander13, but
any other instances as well).

> +
> +&pinctrl {
> +       pinctrl_ncsi3_default: ncsi3_default {
> +               function = "RMII3";
> +               groups = "NCSI3";
> +       };
> +
> +       pinctrl_ncsi4_default: ncsi4_default {
> +               function = "RMII4";
> +               groups = "NCSI4";
> +       };

Can you please rather add these to arch/arm/boot/dts/aspeed/aspeed-g6-
pinctrl.dtsi so other boards can make use of them?

Thanks,

Andrew

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