[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <cover.1750747163.git.yan.kei.fong@altera.com>
Date: Tue, 24 Jun 2025 14:52:24 +0800
From: yankei.fong@...era.com
To: Dinh Nguyen <dinguyen@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS),
linux-kernel@...r.kernel.org (open list),
Matthew Gerlach <matthew.gerlach@...era.com>
Subject: [PATCH 0/4] Add 4-bit SPI bus width on target devices
From: "Fong, Yan Kei" <yan.kei.fong@...era.com>
Add SPI bus width properties to correctly describe the hardware on the following devices:
- Stratix10
- Agilex
- Agilex5
- N5X
Fong, Yan Kei (4):
arm64: dts: socfpga: n5x: Add 4-bit SPI bus width
arm64: dts: socfpga: stratix10: Add 4-bit SPI bus width
arm64: dts: socfpga: agilex: Add 4-bit SPI bus width
arm64: dts: socfpga: agilex5: Add 4-bit SPI bus width
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 2 ++
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts | 2 ++
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 2 ++
arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts | 2 ++
4 files changed, 8 insertions(+)
--
2.25.1
Powered by blists - more mailing lists